42 changed files with 17862 additions and 577 deletions
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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* |
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* Change Logs: |
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* Date Author Notes |
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* 2025-10-27 Administrator the first version |
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*/ |
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#include "lvgl.h" |
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#include "lv_port_disp.h" |
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#include "ssd1963.h" |
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// 屏幕分辨率（请根据实际 LCD 调整）
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#define LCD_WIDTH 480 |
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#define LCD_HEIGHT 272 |
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// 绘图缓冲区：建议为屏幕宽度 * 10 行
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static lv_color_t draw_buf1[LCD_WIDTH * 10]; // 前缓冲
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static lv_color_t draw_buf2[LCD_WIDTH * 10]; // 后缓冲（可选，用于双缓冲）
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// LVGL 绘图缓冲区描述符
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static lv_disp_draw_buf_t draw_buf; |
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// 刷屏完成回调
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static void disp_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p) |
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{ |
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// 设置 SSD1963 显示窗口
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ssd1963_set_window(area->x1, area->y1, area->x2, area->y2); |
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// 写入像素数据
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uint32_t size = (area->x2 - area->x1 + 1) * (area->y2 - area->y1 + 1); |
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for (uint32_t i = 0; i < size; i++) { |
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SSD1963_DATA_ADDR = color_p[i].full; // 使用 FSMC 写入
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} |
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// ✅ 必须调用！通知 LVGL 刷屏已完成
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lv_disp_flush_ready(disp_drv); |
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} |
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/**
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* @brief 初始化 LVGL 显示驱动 |
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*/ |
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void lv_port_disp_init(void) |
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{ |
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// 1. 初始化 FSMC 总线（由 STM32CubeMX 生成）
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// MX_FSMC_Init();
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// 2. 初始化 SSD1963 控制器
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ssd1963_init(); // ✅ 使用 ssd1963.h 中的初始化函数
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// 注释掉重复的 lcd_init()
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// lcd_init(); // ❌ 删除：与 ssd1963_init() 重复或冲突
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// 3. 初始化 LVGL 的绘图缓冲区
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// 参数：缓冲区结构体、第一个缓冲区、第二个缓冲区（可选）、总大小（像素数）
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lv_disp_draw_buf_init(&draw_buf, draw_buf1, draw_buf2, LCD_WIDTH * 10); |
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// 4. 初始化显示驱动
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static lv_disp_drv_t disp_drv; |
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lv_disp_drv_init(&disp_drv); |
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disp_drv.hor_res = LCD_WIDTH; // 水平分辨率
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disp_drv.ver_res = LCD_HEIGHT; // 垂直分辨率
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disp_drv.flush_cb = disp_flush; // 刷屏回调
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disp_drv.draw_buf = &draw_buf; // 绑定缓冲区 ✅ 必须赋值！
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// 5. 注册显示设备到 LVGL
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lv_disp_drv_register(&disp_drv); |
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} |
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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* |
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* Change Logs: |
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* Date Author Notes |
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* 2025-10-27 Administrator the first version |
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*/ |
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#ifndef APPLICATIONS_LV_PORT_DISP_H_ |
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#define APPLICATIONS_LV_PORT_DISP_H_ |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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#define LV_COLOR_DEPTH 16 |
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#define LV_HOR_RES_MAX 480 |
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#define LV_VER_RES_MAX 272 |
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#define LV_DPI 130 |
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void ssd1963_init(void); |
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void ssd1963_set_window(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2); |
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/**
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* @brief 初始化 LVGL 显示驱动 |
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* 调用 ssd1963_init() 并注册到 LVGL |
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*/ |
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void lv_port_disp_init(void); |
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#ifdef __cplusplus |
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} /* extern "C" */ |
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#endif |
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#endif /* APPLICATIONS_LV_PORT_DISP_H_ */ |
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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* |
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* Change Logs: |
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* Date Author Notes |
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* 2025-10-26 Administrator the first version |
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*/ |
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/**
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* @file ssd1963.c |
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* @brief SSD1963 TFT LCD Controller Driver for STM32F407 + FSMC + RT-Thread |
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* @author Qwen (Generated for RTT) |
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* @date 2025-10-26 |
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*/ |
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#include "rtthread.h" |
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#include "rtdevice.h" |
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#include "ssd1963.h" // 确保路径正确 |
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#include <board.h> |
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// ==================== 引脚定义 (根据你的硬件修改) ====================
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#define LCD_RST_PIN GET_PIN(B,2) // 复位引脚
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#define LCD_BL_PIN GET_PIN(B,0) // 背光控制引脚 (PWM)
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// ==================== SSD1963 命令定义 ====================
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#define SSD1963_NOP 0x00 |
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#define SSD1963_SOFT_RESET 0x01 |
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#define SSD1963_GET_PWR_MODE 0x0A |
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#define SSD1963_GET_ADDR_MODE 0x0B |
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#define SSD1963_GET_PIX_FORMAT 0x0C |
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#define SSD1963_GET_SIG_MODE 0x0D |
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#define SSD1963_GET_DIAGNOSTIC 0x0F |
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#define SSD1963_ENTER_SLEEP 0x10 |
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#define SSD1963_EXIT_SLEEP 0x11 |
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#define SSD1963_ENTER_PARTIAL 0x12 |
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#define SSD1963_ENTER_NORMAL 0x13 |
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#define SSD1963_EXIT_INVERT 0x20 |
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#define SSD1963_ENTER_INVERT 0x21 |
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#define SSD1963_SET_GAMMA 0x26 |
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#define SSD1963_BLANK_OFF 0x28 |
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#define SSD1963_BLANK_ON 0x29 |
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#define SSD1963_CLEAR_WINDOW 0x2D |
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#define SSD1963_WRITE_MEMORY_START 0x2C |
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#define SSD1963_READ_MEMORY 0x2E |
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#define SSD1963_SET_PARTIAL_AREA 0x30 |
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#define SSD1963_SET_SCROLL_AREA 0x33 |
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#define SSD1963_SET_TEAR_OFF 0x34 |
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#define SSD1963_SET_TEAR_ON 0x35 |
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#define SSD1963_MEM_ACCESS_CTRL 0x36 |
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#define SSD1963_VERTICAL_SCROLL 0x37 |
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#define SSD1963_IDLE_OFF 0x38 |
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#define SSD1963_IDLE_ON 0x39 |
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#define SSD1963_SET_PIX_FORMAT 0x3A |
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#define SSD1963_SET_IMAGE_FUNC 0x3B |
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#define SSD1963_WRITE_MEMORY_CONTINUE 0x3C |
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#define SSD1963_READ_MEMORY_CONTINUE 0x3E |
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#define SSD1963_SET_COLUMN 0x2A |
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#define SSD1963_SET_ROW 0x2B |
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#define SSD1963_SET_XY 0x2C |
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#define SSD1963_SET_TE_LINE 0x40 |
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#define SSD1963_GET_SCAN_LINE 0x45 |
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#define SSD1963_GET_HOR_PERIOD 0x44 |
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#define SSD1963_SET_PLL_MN 0xE0 |
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#define SSD1963_SET_PLL 0xE2 |
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#define SSD1963_SET_PLL_ENABLE 0xE3 |
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#define SSD1963_SET_DESKTOP_START 0xEA |
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// ==================== 基础操作函数 ====================
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/**
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* @brief 写入命令 |
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* @param cmd 命令字节 |
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*/ |
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static void ssd1963_write_cmd(uint8_t cmd) |
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{ |
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SSD1963_CMD_ADDR = cmd; |
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} |
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/**
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* @brief 写入数据字节 |
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* @param data 数据字节 |
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*/ |
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static void ssd1963_write_data(uint8_t data) |
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{ |
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SSD1963_DATA_ADDR = data; |
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} |
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/**
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* @brief 写入 16 位数据 |
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* @param data 16 位数据 |
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*/ |
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static void ssd1963_write_data_16(uint16_t data) |
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{ |
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SSD1963_DATA_ADDR = data; |
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} |
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/**
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* @brief 写入 32 位数据（分 4 次） |
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* @param data 32 位数据 |
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*/ |
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static void ssd1963_write_data_long(uint32_t data) |
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{ |
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ssd1963_write_data((data >> 24) & 0xFF); |
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ssd1963_write_data((data >> 16) & 0xFF); |
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ssd1963_write_data((data >> 8) & 0xFF); |
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ssd1963_write_data(data & 0xFF); |
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} |
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// ==================== 显示设置函数 ====================
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/**
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* @brief 设置显示窗口（GRAM 区域） |
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* @param x1 起始 X 坐标 |
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* @param y1 起始 Y 坐标 |
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* @param x2 结束 X 坐标 |
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* @param y2 结束 Y 坐标 |
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*/ |
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void ssd1963_set_window(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) |
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{ |
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ssd1963_write_cmd(SSD1963_SET_COLUMN); |
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ssd1963_write_data_long(x1); |
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ssd1963_write_data_long(x2); |
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ssd1963_write_cmd(SSD1963_SET_ROW); |
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ssd1963_write_data_long(y1); |
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ssd1963_write_data_long(y2); |
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ssd1963_write_cmd(SSD1963_WRITE_MEMORY_START); // 准备写 GRAM
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} |
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/**
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* @brief 清屏 |
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* @param color 填充颜色 (RGB565) |
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*/ |
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void ssd1963_clear(rt_uint16_t color) |
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{ |
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uint32_t i; |
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uint32_t total_pixels = 480 * 272; // 根据实际分辨率调整
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ssd1963_set_window(0, 0, 479, 271); |
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for (i = 0; i < total_pixels; i++) |
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{ |
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SSD1963_DATA_ADDR = color; |
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} |
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} |
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// ==================== 初始化函数 ====================
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/**
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* @brief 初始化 SSD1963 控制器 |
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* 支持 480x272 分辨率，16位色 |
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*/ |
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void ssd1963_init(void) |
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{ |
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rt_pin_mode(LCD_RST_PIN, PIN_MODE_OUTPUT); |
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// 复位
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rt_pin_write(LCD_RST_PIN, PIN_LOW); |
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rt_thread_mdelay(100); |
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rt_pin_write(LCD_RST_PIN, PIN_HIGH); |
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rt_thread_mdelay(150); |
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// 软件复位
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ssd1963_write_cmd(SSD1963_SOFT_RESET); |
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rt_thread_mdelay(10); |
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// ============= 设置 PLL =============
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// PLL = (CLK * (M+1)) / (N+1), 典型主频 10MHz 输入
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ssd1963_write_cmd(SSD1963_SET_PLL_MN); |
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ssd1963_write_data(0x23); // M = 35, M+1=36
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ssd1963_write_data(0x02); // N = 2, N+1=3
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ssd1963_write_data(0x04); // DIV = 4
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// 启用 PLL
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ssd1963_write_cmd(SSD1963_SET_PLL_ENABLE); |
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ssd1963_write_data(0x01); // 开启 PLL
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rt_thread_mdelay(1); |
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ssd1963_write_cmd(SSD1963_SET_PLL_ENABLE); |
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ssd1963_write_data(0x03); // 锁定 PLL
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rt_thread_mdelay(5); |
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// 选择 PLL 作为系统时钟
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ssd1963_write_cmd(SSD1963_SET_PLL); |
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ssd1963_write_data(0x03); |
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// ============= 设置 LCD 模式 =============
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ssd1963_write_cmd(0xB0); // Set LCD Mode
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ssd1963_write_data(0x20); // 24-bit/pixel, TFT 模式
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ssd1963_write_data(0x01); // HSYNC+VSYNC 控制
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ssd1963_write_data_long(480); // LCD 宽度
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ssd1963_write_data_long(272); // LCD 高度
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ssd1963_write_data_long(41); // HSYNC 脉冲宽度 (41)
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ssd1963_write_data_long(2); // HSYNC 起始延迟 (HBP)
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ssd1963_write_data_long(2); // HSYNC 结束延迟 (HFP)
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ssd1963_write_data_long(10); // VSYNC 脉冲宽度 (10)
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ssd1963_write_data_long(2); // VSYNC 起始延迟 (VBP)
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ssd1963_write_data_long(2); // VSYNC 结束延迟 (VFP)
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// ============= 设置像素格式 =============
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ssd1963_write_cmd(SSD1963_SET_PIX_FORMAT); |
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ssd1963_write_data(0x55); // 16位色 (RGB565)
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// ============= 设置内存访问方向 =============
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ssd1963_write_cmd(SSD1963_MEM_ACCESS_CTRL); |
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ssd1963_write_data(0x08); // RGB, 正常方向
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// ============= 设置背光 =============
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// rt_pin_mode(LCD_BL_PIN, PIN_MODE_OUTPUT);
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// rt_pwm_enable(LCD_BL_PIN);
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// rt_pwm_set(LCD_BL_PIN, 1000, 50000); // 1kHz, 50% 占空比 (可调)
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// rt_pin_write(LCD_BL_PIN, PIN_HIGH); // 直接输出高电平点亮
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// ============= 开启显示 =============
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ssd1963_write_cmd(SSD1963_EXIT_SLEEP); |
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rt_thread_mdelay(10); |
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ssd1963_write_cmd(SSD1963_BLANK_OFF); |
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ssd1963_write_cmd(SSD1963_ENTER_NORMAL); |
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rt_thread_mdelay(10); |
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ssd1963_write_cmd(SSD1963_IDLE_OFF); |
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// 初始窗口
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ssd1963_set_window(0, 0, 799, 479); |
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// 可选：清屏为黑色
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ssd1963_clear(0x00f0); |
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} |
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// ==================== LVGL 对接接口 (可选封装) ====================
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/**
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* @brief 获取屏幕宽度 |
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* @return 宽度 |
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*/ |
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rt_uint16_t ssd1963_get_width(void) |
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{ |
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return 800; |
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} |
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/**
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* @brief 获取屏幕高度 |
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* @return 高度 |
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*/ |
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rt_uint16_t ssd1963_get_height(void) |
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{ |
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return 480; |
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} |
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team |
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* |
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* SPDX-License-Identifier: Apache-2.0 |
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* |
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* Change Logs: |
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* Date Author Notes |
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* 2025-10-26 Administrator the first version |
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*/ |
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#ifndef APPLICATIONS_SSD1963_H_ |
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#define APPLICATIONS_SSD1963_H_ |
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#include <rtthread.h> |
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// ==================== FSMC 地址映射（必须放在头文件中供外部使用）====================
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// 假设使用 FSMC Bank1, NE1, A16 作为 RS/DC 控制线
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#define SSD1963_BASE_ADDR ((uint32_t)(0x60000000)) // FSMC_NE1
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#define LCD_CMD_ADDR (LCD_BASE_ADDR + 0x00000000) // A0 = 0
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#define LCD_DATA_ADDR (LCD_BASE_ADDR + 0x00020000) // A0 = 1
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// 定义 FSMC 地址：假设使用 Bank1, Base Address 0x60000000，A0 对应地址位1
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#define SSD1963_CMD_ADDR *(volatile uint16_t *)(0x60000000) |
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#define SSD1963_DATA_ADDR *(volatile uint16_t *)(0x60020000) |
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#define LCD_Write_Cmd(cmd) (*(__IO uint16_t*)LCD_CMD_ADDR = (cmd)) |
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#define LCD_Write_Data(dat) (*(__IO uint16_t*)LCD_DATA_ADDR = (dat)) |
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// 函数声明
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void ssd1963_init(void); |
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void ssd1963_set_window(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2); |
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void ssd1963_clear(rt_uint16_t color); |
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rt_uint16_t ssd1963_get_width(void); |
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rt_uint16_t ssd1963_get_height(void); |
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#endif /* APPLICATIONS_SSD1963_H_ */ |
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/**
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****************************************************************************** |
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* @file stm32f4xx_hal_nand.h |
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* @author MCD Application Team |
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* @brief Header file of NAND HAL module. |
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****************************************************************************** |
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* @attention |
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* |
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* Copyright (c) 2016 STMicroelectronics. |
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* All rights reserved. |
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* |
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* This software is licensed under terms that can be found in the LICENSE file |
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* in the root directory of this software component. |
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* If no LICENSE file comes with this software, it is provided AS-IS. |
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* |
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****************************************************************************** |
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef STM32F4xx_HAL_NAND_H |
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#define STM32F4xx_HAL_NAND_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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#if defined(FMC_Bank3) || defined(FMC_Bank2_3) || defined(FSMC_Bank2_3) |
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/* Includes ------------------------------------------------------------------*/ |
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#if defined(FSMC_Bank2_3) |
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#include "stm32f4xx_ll_fsmc.h" |
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#else |
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#include "stm32f4xx_ll_fmc.h" |
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#endif /* FSMC_Bank2_3 */ |
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{ |
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*/ |
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/** @addtogroup NAND
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* @{ |
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*/ |
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/* Exported typedef ----------------------------------------------------------*/ |
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/* Exported types ------------------------------------------------------------*/ |
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/** @defgroup NAND_Exported_Types NAND Exported Types
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* @{ |
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*/ |
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/**
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* @brief HAL NAND State structures definition |
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*/ |
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typedef enum |
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{ |
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HAL_NAND_STATE_RESET = 0x00U, /*!< NAND not yet initialized or disabled */ |
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HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */ |
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HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */ |
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HAL_NAND_STATE_ERROR = 0x03U /*!< NAND error state */ |
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} HAL_NAND_StateTypeDef; |
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/**
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* @brief NAND Memory electronic signature Structure definition |
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*/ |
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typedef struct |
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{ |
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/*<! NAND memory electronic signature maker and device IDs */ |
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|
|||
uint8_t Maker_Id; |
|||
|
|||
uint8_t Device_Id; |
|||
|
|||
uint8_t Third_Id; |
|||
|
|||
uint8_t Fourth_Id; |
|||
} NAND_IDTypeDef; |
|||
|
|||
/**
|
|||
* @brief NAND Memory address Structure definition |
|||
*/ |
|||
typedef struct |
|||
{ |
|||
uint16_t Page; /*!< NAND memory Page address */ |
|||
|
|||
uint16_t Plane; /*!< NAND memory Zone address */ |
|||
|
|||
uint16_t Block; /*!< NAND memory Block address */ |
|||
|
|||
} NAND_AddressTypeDef; |
|||
|
|||
/**
|
|||
* @brief NAND Memory info Structure definition |
|||
*/ |
|||
typedef struct |
|||
{ |
|||
uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in bytes
|
|||
for 8 bits addressing or words for 16 bits addressing */ |
|||
|
|||
uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in bytes
|
|||
for 8 bits addressing or words for 16 bits addressing */ |
|||
|
|||
uint32_t BlockSize; /*!< NAND memory block size measured in number of pages */ |
|||
|
|||
uint32_t BlockNbr; /*!< NAND memory number of total blocks */ |
|||
|
|||
uint32_t PlaneNbr; /*!< NAND memory number of planes */ |
|||
|
|||
uint32_t PlaneSize; /*!< NAND memory zone size measured in number of blocks */ |
|||
|
|||
FunctionalState ExtraCommandEnable; /*!< NAND extra command needed for Page reading mode. This
|
|||
parameter is mandatory for some NAND parts after the read |
|||
command (NAND_CMD_AREA_TRUE1) and before DATA reading sequence. |
|||
This parameter could be ENABLE or DISABLE |
|||
Please check the Read Mode sequence in the NAND device datasheet */ |
|||
} NAND_DeviceConfigTypeDef; |
|||
|
|||
/**
|
|||
* @brief NAND handle Structure definition |
|||
*/ |
|||
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1) |
|||
typedef struct __NAND_HandleTypeDef |
|||
#else |
|||
typedef struct |
|||
#endif /* USE_HAL_NAND_REGISTER_CALLBACKS */ |
|||
{ |
|||
FMC_NAND_TypeDef *Instance; /*!< Register base address */ |
|||
|
|||
FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */ |
|||
|
|||
HAL_LockTypeDef Lock; /*!< NAND locking object */ |
|||
|
|||
__IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */ |
|||
|
|||
NAND_DeviceConfigTypeDef Config; /*!< NAND physical characteristic information structure */ |
|||
|
|||
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1) |
|||
void (* MspInitCallback)(struct __NAND_HandleTypeDef *hnand); /*!< NAND Msp Init callback */ |
|||
void (* MspDeInitCallback)(struct __NAND_HandleTypeDef *hnand); /*!< NAND Msp DeInit callback */ |
|||
void (* ItCallback)(struct __NAND_HandleTypeDef *hnand); /*!< NAND IT callback */ |
|||
#endif /* USE_HAL_NAND_REGISTER_CALLBACKS */ |
|||
} NAND_HandleTypeDef; |
|||
|
|||
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1) |
|||
/**
|
|||
* @brief HAL NAND Callback ID enumeration definition |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_NAND_MSP_INIT_CB_ID = 0x00U, /*!< NAND MspInit Callback ID */ |
|||
HAL_NAND_MSP_DEINIT_CB_ID = 0x01U, /*!< NAND MspDeInit Callback ID */ |
|||
HAL_NAND_IT_CB_ID = 0x02U /*!< NAND IT Callback ID */ |
|||
} HAL_NAND_CallbackIDTypeDef; |
|||
|
|||
/**
|
|||
* @brief HAL NAND Callback pointer definition |
|||
*/ |
|||
typedef void (*pNAND_CallbackTypeDef)(NAND_HandleTypeDef *hnand); |
|||
#endif /* USE_HAL_NAND_REGISTER_CALLBACKS */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported constants --------------------------------------------------------*/ |
|||
/* Exported macro ------------------------------------------------------------*/ |
|||
/** @defgroup NAND_Exported_Macros NAND Exported Macros
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @brief Reset NAND handle state
|
|||
* @param __HANDLE__ specifies the NAND handle. |
|||
* @retval None |
|||
*/ |
|||
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1) |
|||
#define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) do { \ |
|||
(__HANDLE__)->State = HAL_NAND_STATE_RESET; \ |
|||
(__HANDLE__)->MspInitCallback = NULL; \ |
|||
(__HANDLE__)->MspDeInitCallback = NULL; \ |
|||
} while(0) |
|||
#else |
|||
#define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET) |
|||
#endif /* USE_HAL_NAND_REGISTER_CALLBACKS */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported functions --------------------------------------------------------*/ |
|||
/** @addtogroup NAND_Exported_Functions NAND Exported Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Initialization/de-initialization functions ********************************/ |
|||
HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, |
|||
FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing); |
|||
HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand); |
|||
|
|||
HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, const NAND_DeviceConfigTypeDef *pDeviceConfig); |
|||
|
|||
HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID); |
|||
|
|||
void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand); |
|||
void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand); |
|||
void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand); |
|||
void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand); |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* IO operation functions ****************************************************/ |
|||
HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand); |
|||
|
|||
HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, |
|||
uint8_t *pBuffer, uint32_t NumPageToRead); |
|||
HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, |
|||
const uint8_t *pBuffer, uint32_t NumPageToWrite); |
|||
HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, |
|||
uint8_t *pBuffer, uint32_t NumSpareAreaToRead); |
|||
HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, |
|||
const uint8_t *pBuffer, uint32_t NumSpareAreaTowrite); |
|||
|
|||
HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, |
|||
uint16_t *pBuffer, uint32_t NumPageToRead); |
|||
HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, |
|||
const uint16_t *pBuffer, uint32_t NumPageToWrite); |
|||
HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, |
|||
uint16_t *pBuffer, uint32_t NumSpareAreaToRead); |
|||
HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress, |
|||
const uint16_t *pBuffer, uint32_t NumSpareAreaTowrite); |
|||
|
|||
HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, const NAND_AddressTypeDef *pAddress); |
|||
|
|||
uint32_t HAL_NAND_Address_Inc(const NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress); |
|||
|
|||
#if (USE_HAL_NAND_REGISTER_CALLBACKS == 1) |
|||
/* NAND callback registering/unregistering */ |
|||
HAL_StatusTypeDef HAL_NAND_RegisterCallback(NAND_HandleTypeDef *hnand, HAL_NAND_CallbackIDTypeDef CallbackId, |
|||
pNAND_CallbackTypeDef pCallback); |
|||
HAL_StatusTypeDef HAL_NAND_UnRegisterCallback(NAND_HandleTypeDef *hnand, HAL_NAND_CallbackIDTypeDef CallbackId); |
|||
#endif /* USE_HAL_NAND_REGISTER_CALLBACKS */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* NAND Control functions ****************************************************/ |
|||
HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand); |
|||
HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand); |
|||
HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout); |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
|
|||
* @{ |
|||
*/ |
|||
/* NAND State functions *******************************************************/ |
|||
HAL_NAND_StateTypeDef HAL_NAND_GetState(const NAND_HandleTypeDef *hnand); |
|||
uint32_t HAL_NAND_Read_Status(const NAND_HandleTypeDef *hnand); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private types -------------------------------------------------------------*/ |
|||
/* Private variables ---------------------------------------------------------*/ |
|||
/* Private constants ---------------------------------------------------------*/ |
|||
/** @defgroup NAND_Private_Constants NAND Private Constants
|
|||
* @{ |
|||
*/ |
|||
#if defined(FMC_Bank2_3) |
|||
#define NAND_DEVICE1 0x70000000UL |
|||
#define NAND_DEVICE2 0x80000000UL |
|||
#else |
|||
#define NAND_DEVICE 0x80000000UL |
|||
#endif /* FMC_Bank2_3 */ |
|||
#define NAND_WRITE_TIMEOUT 0x01000000UL |
|||
|
|||
#define CMD_AREA (1UL<<16U) /* A16 = CLE high */ |
|||
#define ADDR_AREA (1UL<<17U) /* A17 = ALE high */ |
|||
|
|||
#define NAND_CMD_AREA_A ((uint8_t)0x00) |
|||
#define NAND_CMD_AREA_B ((uint8_t)0x01) |
|||
#define NAND_CMD_AREA_C ((uint8_t)0x50) |
|||
#define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30) |
|||
|
|||
#define NAND_CMD_WRITE0 ((uint8_t)0x80) |
|||
#define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10) |
|||
#define NAND_CMD_ERASE0 ((uint8_t)0x60) |
|||
#define NAND_CMD_ERASE1 ((uint8_t)0xD0) |
|||
#define NAND_CMD_READID ((uint8_t)0x90) |
|||
#define NAND_CMD_STATUS ((uint8_t)0x70) |
|||
#define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A) |
|||
#define NAND_CMD_RESET ((uint8_t)0xFF) |
|||
|
|||
/* NAND memory status */ |
|||
#define NAND_VALID_ADDRESS 0x00000100UL |
|||
#define NAND_INVALID_ADDRESS 0x00000200UL |
|||
#define NAND_TIMEOUT_ERROR 0x00000400UL |
|||
#define NAND_BUSY 0x00000000UL |
|||
#define NAND_ERROR 0x00000001UL |
|||
#define NAND_READY 0x00000040UL |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private macros ------------------------------------------------------------*/ |
|||
/** @defgroup NAND_Private_Macros NAND Private Macros
|
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @brief NAND memory address computation. |
|||
* @param __ADDRESS__ NAND memory address. |
|||
* @param __HANDLE__ NAND handle. |
|||
* @retval NAND Raw address value |
|||
*/ |
|||
#define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \ |
|||
(((__ADDRESS__)->Block + \ |
|||
(((__ADDRESS__)->Plane) * \ |
|||
((__HANDLE__)->Config.PlaneSize))) * \ |
|||
((__HANDLE__)->Config.BlockSize))) |
|||
|
|||
/**
|
|||
* @brief NAND memory Column address computation. |
|||
* @param __HANDLE__ NAND handle. |
|||
* @retval NAND Raw address value |
|||
*/ |
|||
#define COLUMN_ADDRESS( __HANDLE__) ((__HANDLE__)->Config.PageSize) |
|||
|
|||
/**
|
|||
* @brief NAND memory address cycling. |
|||
* @param __ADDRESS__ NAND memory address. |
|||
* @retval NAND address cycling value. |
|||
*/ |
|||
#define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */ |
|||
#define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */ |
|||
#define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */ |
|||
#define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */ |
|||
|
|||
/**
|
|||
* @brief NAND memory Columns cycling. |
|||
* @param __ADDRESS__ NAND memory address. |
|||
* @retval NAND Column address cycling value. |
|||
*/ |
|||
#define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) & 0xFFU) /* 1st Column addressing cycle */ |
|||
#define COLUMN_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd Column addressing cycle */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
#endif /* FMC_Bank3) || defined(FMC_Bank2_3) || defined(FSMC_Bank2_3 */ |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
#endif /* STM32F4xx_HAL_NAND_H */ |
|||
@ -0,0 +1,330 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32f4xx_hal_nor.h |
|||
* @author MCD Application Team |
|||
* @brief Header file of NOR HAL module. |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* Copyright (c) 2016 STMicroelectronics. |
|||
* All rights reserved. |
|||
* |
|||
* This software is licensed under terms that can be found in the LICENSE file |
|||
* in the root directory of this software component. |
|||
* If no LICENSE file comes with this software, it is provided AS-IS. |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Define to prevent recursive inclusion -------------------------------------*/ |
|||
#ifndef STM32F4xx_HAL_NOR_H |
|||
#define STM32F4xx_HAL_NOR_H |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
#if defined(FMC_Bank1) || defined(FSMC_Bank1) |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#if defined(FSMC_Bank1) |
|||
#include "stm32f4xx_ll_fsmc.h" |
|||
#else |
|||
#include "stm32f4xx_ll_fmc.h" |
|||
#endif /* FMC_Bank1 */ |
|||
|
|||
/** @addtogroup STM32F4xx_HAL_Driver
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup NOR
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Exported typedef ----------------------------------------------------------*/ |
|||
/** @defgroup NOR_Exported_Types NOR Exported Types
|
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @brief HAL SRAM State structures definition |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */ |
|||
HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */ |
|||
HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */ |
|||
HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */ |
|||
HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */ |
|||
} HAL_NOR_StateTypeDef; |
|||
|
|||
/**
|
|||
* @brief FMC NOR Status typedef |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_NOR_STATUS_SUCCESS = 0U, |
|||
HAL_NOR_STATUS_ONGOING, |
|||
HAL_NOR_STATUS_ERROR, |
|||
HAL_NOR_STATUS_TIMEOUT |
|||
} HAL_NOR_StatusTypeDef; |
|||
|
|||
/**
|
|||
* @brief FMC NOR ID typedef |
|||
*/ |
|||
typedef struct |
|||
{ |
|||
uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */ |
|||
|
|||
uint16_t Device_Code1; |
|||
|
|||
uint16_t Device_Code2; |
|||
|
|||
uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
|
|||
These codes can be accessed by performing read operations with specific |
|||
control signals and addresses set.They can also be accessed by issuing |
|||
an Auto Select command */ |
|||
} NOR_IDTypeDef; |
|||
|
|||
/**
|
|||
* @brief FMC NOR CFI typedef |
|||
*/ |
|||
typedef struct |
|||
{ |
|||
/*!< Defines the information stored in the memory's Common flash interface
|
|||
which contains a description of various electrical and timing parameters, |
|||
density information and functions supported by the memory */ |
|||
|
|||
uint16_t CFI_1; |
|||
|
|||
uint16_t CFI_2; |
|||
|
|||
uint16_t CFI_3; |
|||
|
|||
uint16_t CFI_4; |
|||
} NOR_CFITypeDef; |
|||
|
|||
/**
|
|||
* @brief NOR handle Structure definition |
|||
*/ |
|||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) |
|||
typedef struct __NOR_HandleTypeDef |
|||
#else |
|||
typedef struct |
|||
#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ |
|||
|
|||
{ |
|||
FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ |
|||
|
|||
FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ |
|||
|
|||
FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */ |
|||
|
|||
HAL_LockTypeDef Lock; /*!< NOR locking object */ |
|||
|
|||
__IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */ |
|||
|
|||
uint32_t CommandSet; /*!< NOR algorithm command set and control */ |
|||
|
|||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) |
|||
void (* MspInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp Init callback */ |
|||
void (* MspDeInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp DeInit callback */ |
|||
#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ |
|||
} NOR_HandleTypeDef; |
|||
|
|||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) |
|||
/**
|
|||
* @brief HAL NOR Callback ID enumeration definition |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_NOR_MSP_INIT_CB_ID = 0x00U, /*!< NOR MspInit Callback ID */ |
|||
HAL_NOR_MSP_DEINIT_CB_ID = 0x01U /*!< NOR MspDeInit Callback ID */ |
|||
} HAL_NOR_CallbackIDTypeDef; |
|||
|
|||
/**
|
|||
* @brief HAL NOR Callback pointer definition |
|||
*/ |
|||
typedef void (*pNOR_CallbackTypeDef)(NOR_HandleTypeDef *hnor); |
|||
#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported constants --------------------------------------------------------*/ |
|||
/* Exported macro ------------------------------------------------------------*/ |
|||
/** @defgroup NOR_Exported_Macros NOR Exported Macros
|
|||
* @{ |
|||
*/ |
|||
/** @brief Reset NOR handle state
|
|||
* @param __HANDLE__ specifies the NOR handle. |
|||
* @retval None |
|||
*/ |
|||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) |
|||
#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) do { \ |
|||
(__HANDLE__)->State = HAL_NOR_STATE_RESET; \ |
|||
(__HANDLE__)->MspInitCallback = NULL; \ |
|||
(__HANDLE__)->MspDeInitCallback = NULL; \ |
|||
} while(0) |
|||
#else |
|||
#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET) |
|||
#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported functions --------------------------------------------------------*/ |
|||
/** @addtogroup NOR_Exported_Functions NOR Exported Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Initialization/de-initialization functions ********************************/ |
|||
HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, |
|||
FMC_NORSRAM_TimingTypeDef *ExtTiming); |
|||
HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor); |
|||
void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor); |
|||
void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor); |
|||
void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* I/O operation functions ***************************************************/ |
|||
HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID); |
|||
HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor); |
|||
HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); |
|||
HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); |
|||
|
|||
HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, |
|||
uint32_t uwBufferSize); |
|||
HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, |
|||
uint32_t uwBufferSize); |
|||
|
|||
HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address); |
|||
HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address); |
|||
HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI); |
|||
|
|||
#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) |
|||
/* NOR callback registering/unregistering */ |
|||
HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId, |
|||
pNOR_CallbackTypeDef pCallback); |
|||
HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId); |
|||
#endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* NOR Control functions *****************************************************/ |
|||
HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor); |
|||
HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup NOR_Exported_Functions_Group4 NOR State functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* NOR State functions ********************************************************/ |
|||
HAL_NOR_StateTypeDef HAL_NOR_GetState(const NOR_HandleTypeDef *hnor); |
|||
HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private types -------------------------------------------------------------*/ |
|||
/* Private variables ---------------------------------------------------------*/ |
|||
/* Private constants ---------------------------------------------------------*/ |
|||
/** @defgroup NOR_Private_Constants NOR Private Constants
|
|||
* @{ |
|||
*/ |
|||
/* NOR device IDs addresses */ |
|||
#define MC_ADDRESS ((uint16_t)0x0000) |
|||
#define DEVICE_CODE1_ADDR ((uint16_t)0x0001) |
|||
#define DEVICE_CODE2_ADDR ((uint16_t)0x000E) |
|||
#define DEVICE_CODE3_ADDR ((uint16_t)0x000F) |
|||
|
|||
/* NOR CFI IDs addresses */ |
|||
#define CFI1_ADDRESS ((uint16_t)0x0061) |
|||
#define CFI2_ADDRESS ((uint16_t)0x0062) |
|||
#define CFI3_ADDRESS ((uint16_t)0x0063) |
|||
#define CFI4_ADDRESS ((uint16_t)0x0064) |
|||
|
|||
/* NOR operation wait timeout */ |
|||
#define NOR_TMEOUT ((uint16_t)0xFFFF) |
|||
|
|||
/* NOR memory data width */ |
|||
#define NOR_MEMORY_8B ((uint8_t)0x00) |
|||
#define NOR_MEMORY_16B ((uint8_t)0x01) |
|||
|
|||
/* NOR memory device read/write start address */ |
|||
#define NOR_MEMORY_ADRESS1 (0x60000000U) |
|||
#define NOR_MEMORY_ADRESS2 (0x64000000U) |
|||
#define NOR_MEMORY_ADRESS3 (0x68000000U) |
|||
#define NOR_MEMORY_ADRESS4 (0x6C000000U) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private macros ------------------------------------------------------------*/ |
|||
/** @defgroup NOR_Private_Macros NOR Private Macros
|
|||
* @{ |
|||
*/ |
|||
/**
|
|||
* @brief NOR memory address shifting. |
|||
* @param __NOR_ADDRESS NOR base address |
|||
* @param __NOR_MEMORY_WIDTH_ NOR memory width |
|||
* @param __ADDRESS__ NOR memory address |
|||
* @retval NOR shifted address value |
|||
*/ |
|||
#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \ |
|||
((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \ |
|||
((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \ |
|||
((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__))))) |
|||
|
|||
/**
|
|||
* @brief NOR memory write data to specified address. |
|||
* @param __ADDRESS__ NOR memory address |
|||
* @param __DATA__ Data to write |
|||
* @retval None |
|||
*/ |
|||
#define NOR_WRITE(__ADDRESS__, __DATA__) do{ \ |
|||
(*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \ |
|||
__DSB(); \ |
|||
} while(0) |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
#endif /* FMC_Bank1 || FSMC_Bank1 */ |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
#endif /* STM32F4xx_HAL_NOR_H */ |
|||
@ -0,0 +1,286 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32f4xx_hal_pccard.h |
|||
* @author MCD Application Team |
|||
* @brief Header file of PCCARD HAL module. |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* Copyright (c) 2016 STMicroelectronics. |
|||
* All rights reserved. |
|||
* |
|||
* This software is licensed under terms that can be found in the LICENSE file |
|||
* in the root directory of this software component. |
|||
* If no LICENSE file comes with this software, it is provided AS-IS. |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Define to prevent recursive inclusion -------------------------------------*/ |
|||
#ifndef STM32F4xx_HAL_PCCARD_H |
|||
#define STM32F4xx_HAL_PCCARD_H |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
#if defined(FMC_Bank4) || defined(FSMC_Bank4) |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#if defined(FSMC_Bank4) |
|||
#include "stm32f4xx_ll_fsmc.h" |
|||
#else |
|||
#include "stm32f4xx_ll_fmc.h" |
|||
#endif /* FSMC_Bank4 */ |
|||
|
|||
/** @addtogroup STM32F4xx_HAL_Driver
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup PCCARD
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Exported typedef ----------------------------------------------------------*/ |
|||
/** @defgroup PCCARD_Exported_Types PCCARD Exported Types
|
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @brief HAL PCCARD State structures definition |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_PCCARD_STATE_RESET = 0x00U, /*!< PCCARD peripheral not yet initialized or disabled */ |
|||
HAL_PCCARD_STATE_READY = 0x01U, /*!< PCCARD peripheral ready */ |
|||
HAL_PCCARD_STATE_BUSY = 0x02U, /*!< PCCARD peripheral busy */ |
|||
HAL_PCCARD_STATE_ERROR = 0x04U /*!< PCCARD peripheral error */ |
|||
} HAL_PCCARD_StateTypeDef; |
|||
|
|||
typedef enum |
|||
{ |
|||
HAL_PCCARD_STATUS_SUCCESS = 0U, |
|||
HAL_PCCARD_STATUS_ONGOING, |
|||
HAL_PCCARD_STATUS_ERROR, |
|||
HAL_PCCARD_STATUS_TIMEOUT |
|||
} HAL_PCCARD_StatusTypeDef; |
|||
|
|||
/**
|
|||
* @brief FMC_PCCARD handle Structure definition |
|||
*/ |
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
typedef struct __PCCARD_HandleTypeDef |
|||
#else |
|||
typedef struct |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
{ |
|||
FMC_PCCARD_TypeDef *Instance; /*!< Register base address for PCCARD device */ |
|||
|
|||
FMC_PCCARD_InitTypeDef Init; /*!< PCCARD device control configuration parameters */ |
|||
|
|||
__IO HAL_PCCARD_StateTypeDef State; /*!< PCCARD device access state */ |
|||
|
|||
HAL_LockTypeDef Lock; /*!< PCCARD Lock */ |
|||
|
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
void (* MspInitCallback)(struct __PCCARD_HandleTypeDef *hpccard); /*!< PCCARD Msp Init callback */ |
|||
void (* MspDeInitCallback)(struct __PCCARD_HandleTypeDef *hpccard); /*!< PCCARD Msp DeInit callback */ |
|||
void (* ItCallback)(struct __PCCARD_HandleTypeDef *hpccard); /*!< PCCARD IT callback */ |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
} PCCARD_HandleTypeDef; |
|||
|
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
/**
|
|||
* @brief HAL PCCARD Callback ID enumeration definition |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_PCCARD_MSP_INIT_CB_ID = 0x00U, /*!< PCCARD MspInit Callback ID */ |
|||
HAL_PCCARD_MSP_DEINIT_CB_ID = 0x01U, /*!< PCCARD MspDeInit Callback ID */ |
|||
HAL_PCCARD_IT_CB_ID = 0x02U /*!< PCCARD IT Callback ID */ |
|||
} HAL_PCCARD_CallbackIDTypeDef; |
|||
|
|||
/**
|
|||
* @brief HAL PCCARD Callback pointer definition |
|||
*/ |
|||
typedef void (*pPCCARD_CallbackTypeDef)(PCCARD_HandleTypeDef *hpccard); |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported constants --------------------------------------------------------*/ |
|||
/* Exported macro ------------------------------------------------------------*/ |
|||
/** @defgroup PCCARD_Exported_Macros PCCARD Exported Macros
|
|||
* @{ |
|||
*/ |
|||
/** @brief Reset PCCARD handle state
|
|||
* @param __HANDLE__ specifies the PCCARD handle. |
|||
* @retval None |
|||
*/ |
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
#define __HAL_PCCARD_RESET_HANDLE_STATE(__HANDLE__) do { \ |
|||
(__HANDLE__)->State = HAL_PCCARD_STATE_RESET; \ |
|||
(__HANDLE__)->MspInitCallback = NULL; \ |
|||
(__HANDLE__)->MspDeInitCallback = NULL; \ |
|||
} while(0) |
|||
#else |
|||
#define __HAL_PCCARD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_PCCARD_STATE_RESET) |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported functions --------------------------------------------------------*/ |
|||
/** @addtogroup PCCARD_Exported_Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup PCCARD_Exported_Functions_Group1
|
|||
* @{ |
|||
*/ |
|||
/* Initialization/de-initialization functions **********************************/ |
|||
HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, |
|||
FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, |
|||
FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming); |
|||
HAL_StatusTypeDef HAL_PCCARD_DeInit(PCCARD_HandleTypeDef *hpccard); |
|||
void HAL_PCCARD_MspInit(PCCARD_HandleTypeDef *hpccard); |
|||
void HAL_PCCARD_MspDeInit(PCCARD_HandleTypeDef *hpccard); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup PCCARD_Exported_Functions_Group2
|
|||
* @{ |
|||
*/ |
|||
/* IO operation functions *****************************************************/ |
|||
HAL_StatusTypeDef HAL_PCCARD_Read_ID(PCCARD_HandleTypeDef *hpccard, uint8_t CompactFlash_ID[], uint8_t *pStatus); |
|||
HAL_StatusTypeDef HAL_PCCARD_Write_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress, |
|||
uint8_t *pStatus); |
|||
HAL_StatusTypeDef HAL_PCCARD_Read_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress, |
|||
uint8_t *pStatus); |
|||
HAL_StatusTypeDef HAL_PCCARD_Erase_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t SectorAddress, uint8_t *pStatus); |
|||
HAL_StatusTypeDef HAL_PCCARD_Reset(PCCARD_HandleTypeDef *hpccard); |
|||
void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard); |
|||
void HAL_PCCARD_ITCallback(PCCARD_HandleTypeDef *hpccard); |
|||
|
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
/* PCCARD callback registering/unregistering */ |
|||
HAL_StatusTypeDef HAL_PCCARD_RegisterCallback(PCCARD_HandleTypeDef *hpccard, HAL_PCCARD_CallbackIDTypeDef CallbackId, |
|||
pPCCARD_CallbackTypeDef pCallback); |
|||
HAL_StatusTypeDef HAL_PCCARD_UnRegisterCallback(PCCARD_HandleTypeDef *hpccard, |
|||
HAL_PCCARD_CallbackIDTypeDef CallbackId); |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup PCCARD_Exported_Functions_Group3
|
|||
* @{ |
|||
*/ |
|||
/* PCCARD State functions *******************************************************/ |
|||
HAL_PCCARD_StateTypeDef HAL_PCCARD_GetState(PCCARD_HandleTypeDef *hpccard); |
|||
HAL_PCCARD_StatusTypeDef HAL_PCCARD_GetStatus(PCCARD_HandleTypeDef *hpccard); |
|||
HAL_PCCARD_StatusTypeDef HAL_PCCARD_ReadStatus(PCCARD_HandleTypeDef *hpccard); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
/* Private types -------------------------------------------------------------*/ |
|||
/* Private variables ---------------------------------------------------------*/ |
|||
/* Private constants ---------------------------------------------------------*/ |
|||
/** @defgroup PCCARD_Private_Constants PCCARD Private Constants
|
|||
* @{ |
|||
*/ |
|||
#define PCCARD_DEVICE_ADDRESS 0x90000000U |
|||
#define PCCARD_ATTRIBUTE_SPACE_ADDRESS 0x98000000U /* Attribute space size to @0x9BFF FFFF */ |
|||
#define PCCARD_COMMON_SPACE_ADDRESS PCCARD_DEVICE_ADDRESS /* Common space size to @0x93FF FFFF */ |
|||
#define PCCARD_IO_SPACE_ADDRESS 0x9C000000U /* IO space size to @0x9FFF FFFF */ |
|||
#define PCCARD_IO_SPACE_PRIMARY_ADDR 0x9C0001F0U /* IO space size to @0x9FFF FFFF */ |
|||
|
|||
/* Flash-ATA registers description */ |
|||
#define ATA_DATA ((uint8_t)0x00) /* Data register */ |
|||
#define ATA_SECTOR_COUNT ((uint8_t)0x02) /* Sector Count register */ |
|||
#define ATA_SECTOR_NUMBER ((uint8_t)0x03) /* Sector Number register */ |
|||
#define ATA_CYLINDER_LOW ((uint8_t)0x04) /* Cylinder low register */ |
|||
#define ATA_CYLINDER_HIGH ((uint8_t)0x05) /* Cylinder high register */ |
|||
#define ATA_CARD_HEAD ((uint8_t)0x06) /* Card/Head register */ |
|||
#define ATA_STATUS_CMD ((uint8_t)0x07) /* Status(read)/Command(write) register */ |
|||
#define ATA_STATUS_CMD_ALTERNATE ((uint8_t)0x0E) /* Alternate Status(read)/Command(write) register */ |
|||
#define ATA_COMMON_DATA_AREA ((uint16_t)0x0400) /* Start of data area (for Common access only!) */ |
|||
#define ATA_CARD_CONFIGURATION ((uint16_t)0x0202) /* Card Configuration and Status Register */ |
|||
|
|||
/* Flash-ATA commands */ |
|||
#define ATA_READ_SECTOR_CMD ((uint8_t)0x20) |
|||
#define ATA_WRITE_SECTOR_CMD ((uint8_t)0x30) |
|||
#define ATA_ERASE_SECTOR_CMD ((uint8_t)0xC0) |
|||
#define ATA_IDENTIFY_CMD ((uint8_t)0xEC) |
|||
|
|||
/* PC Card/Compact Flash status */ |
|||
#define PCCARD_TIMEOUT_ERROR ((uint8_t)0x60) |
|||
#define PCCARD_BUSY ((uint8_t)0x80) |
|||
#define PCCARD_PROGR ((uint8_t)0x01) |
|||
#define PCCARD_READY ((uint8_t)0x40) |
|||
|
|||
#define PCCARD_SECTOR_SIZE 255U /* In half words */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
/* Compact Flash redefinition */ |
|||
#define HAL_CF_Init HAL_PCCARD_Init |
|||
#define HAL_CF_DeInit HAL_PCCARD_DeInit |
|||
#define HAL_CF_MspInit HAL_PCCARD_MspInit |
|||
#define HAL_CF_MspDeInit HAL_PCCARD_MspDeInit |
|||
|
|||
#define HAL_CF_Read_ID HAL_PCCARD_Read_ID |
|||
#define HAL_CF_Write_Sector HAL_PCCARD_Write_Sector |
|||
#define HAL_CF_Read_Sector HAL_PCCARD_Read_Sector |
|||
#define HAL_CF_Erase_Sector HAL_PCCARD_Erase_Sector |
|||
#define HAL_CF_Reset HAL_PCCARD_Reset |
|||
#define HAL_CF_IRQHandler HAL_PCCARD_IRQHandler |
|||
#define HAL_CF_ITCallback HAL_PCCARD_ITCallback |
|||
|
|||
#define HAL_CF_GetState HAL_PCCARD_GetState |
|||
#define HAL_CF_GetStatus HAL_PCCARD_GetStatus |
|||
#define HAL_CF_ReadStatus HAL_PCCARD_ReadStatus |
|||
|
|||
#define HAL_CF_STATUS_SUCCESS HAL_PCCARD_STATUS_SUCCESS |
|||
#define HAL_CF_STATUS_ONGOING HAL_PCCARD_STATUS_ONGOING |
|||
#define HAL_CF_STATUS_ERROR HAL_PCCARD_STATUS_ERROR |
|||
#define HAL_CF_STATUS_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT |
|||
#define HAL_CF_StatusTypeDef HAL_PCCARD_StatusTypeDef |
|||
|
|||
#define CF_DEVICE_ADDRESS PCCARD_DEVICE_ADDRESS |
|||
#define CF_ATTRIBUTE_SPACE_ADDRESS PCCARD_ATTRIBUTE_SPACE_ADDRESS |
|||
#define CF_COMMON_SPACE_ADDRESS PCCARD_COMMON_SPACE_ADDRESS |
|||
#define CF_IO_SPACE_ADDRESS PCCARD_IO_SPACE_ADDRESS |
|||
#define CF_IO_SPACE_PRIMARY_ADDR PCCARD_IO_SPACE_PRIMARY_ADDR |
|||
|
|||
#define CF_TIMEOUT_ERROR PCCARD_TIMEOUT_ERROR |
|||
#define CF_BUSY PCCARD_BUSY |
|||
#define CF_PROGR PCCARD_PROGR |
|||
#define CF_READY PCCARD_READY |
|||
|
|||
#define CF_SECTOR_SIZE PCCARD_SECTOR_SIZE |
|||
|
|||
/* Private macros ------------------------------------------------------------*/ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
#endif /* FMC_Bank4 || FSMC_Bank4 */ |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
#endif /* STM32F4xx_HAL_PCCARD_H */ |
|||
@ -0,0 +1,236 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32f4xx_hal_sram.h |
|||
* @author MCD Application Team |
|||
* @brief Header file of SRAM HAL module. |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* Copyright (c) 2016 STMicroelectronics. |
|||
* All rights reserved. |
|||
* |
|||
* This software is licensed under terms that can be found in the LICENSE file |
|||
* in the root directory of this software component. |
|||
* If no LICENSE file comes with this software, it is provided AS-IS. |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Define to prevent recursive inclusion -------------------------------------*/ |
|||
#ifndef STM32F4xx_HAL_SRAM_H |
|||
#define STM32F4xx_HAL_SRAM_H |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
#if defined(FMC_Bank1) || defined(FSMC_Bank1) |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#if defined(FSMC_Bank1) |
|||
#include "stm32f4xx_ll_fsmc.h" |
|||
#else |
|||
#include "stm32f4xx_ll_fmc.h" |
|||
#endif /* FSMC_Bank1 */ |
|||
|
|||
/** @addtogroup STM32F4xx_HAL_Driver
|
|||
* @{ |
|||
*/ |
|||
/** @addtogroup SRAM
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Exported typedef ----------------------------------------------------------*/ |
|||
|
|||
/** @defgroup SRAM_Exported_Types SRAM Exported Types
|
|||
* @{ |
|||
*/ |
|||
/**
|
|||
* @brief HAL SRAM State structures definition |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_SRAM_STATE_RESET = 0x00U, /*!< SRAM not yet initialized or disabled */ |
|||
HAL_SRAM_STATE_READY = 0x01U, /*!< SRAM initialized and ready for use */ |
|||
HAL_SRAM_STATE_BUSY = 0x02U, /*!< SRAM internal process is ongoing */ |
|||
HAL_SRAM_STATE_ERROR = 0x03U, /*!< SRAM error state */ |
|||
HAL_SRAM_STATE_PROTECTED = 0x04U /*!< SRAM peripheral NORSRAM device write protected */ |
|||
|
|||
} HAL_SRAM_StateTypeDef; |
|||
|
|||
/**
|
|||
* @brief SRAM handle Structure definition |
|||
*/ |
|||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) |
|||
typedef struct __SRAM_HandleTypeDef |
|||
#else |
|||
typedef struct |
|||
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ |
|||
{ |
|||
FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ |
|||
|
|||
FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ |
|||
|
|||
FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */ |
|||
|
|||
HAL_LockTypeDef Lock; /*!< SRAM locking object */ |
|||
|
|||
__IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */ |
|||
|
|||
DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ |
|||
|
|||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) |
|||
void (* MspInitCallback)(struct __SRAM_HandleTypeDef *hsram); /*!< SRAM Msp Init callback */ |
|||
void (* MspDeInitCallback)(struct __SRAM_HandleTypeDef *hsram); /*!< SRAM Msp DeInit callback */ |
|||
void (* DmaXferCpltCallback)(DMA_HandleTypeDef *hdma); /*!< SRAM DMA Xfer Complete callback */ |
|||
void (* DmaXferErrorCallback)(DMA_HandleTypeDef *hdma); /*!< SRAM DMA Xfer Error callback */ |
|||
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ |
|||
} SRAM_HandleTypeDef; |
|||
|
|||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) |
|||
/**
|
|||
* @brief HAL SRAM Callback ID enumeration definition |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_SRAM_MSP_INIT_CB_ID = 0x00U, /*!< SRAM MspInit Callback ID */ |
|||
HAL_SRAM_MSP_DEINIT_CB_ID = 0x01U, /*!< SRAM MspDeInit Callback ID */ |
|||
HAL_SRAM_DMA_XFER_CPLT_CB_ID = 0x02U, /*!< SRAM DMA Xfer Complete Callback ID */ |
|||
HAL_SRAM_DMA_XFER_ERR_CB_ID = 0x03U /*!< SRAM DMA Xfer Complete Callback ID */ |
|||
} HAL_SRAM_CallbackIDTypeDef; |
|||
|
|||
/**
|
|||
* @brief HAL SRAM Callback pointer definition |
|||
*/ |
|||
typedef void (*pSRAM_CallbackTypeDef)(SRAM_HandleTypeDef *hsram); |
|||
typedef void (*pSRAM_DmaCallbackTypeDef)(DMA_HandleTypeDef *hdma); |
|||
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported constants --------------------------------------------------------*/ |
|||
/* Exported macro ------------------------------------------------------------*/ |
|||
|
|||
/** @defgroup SRAM_Exported_Macros SRAM Exported Macros
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @brief Reset SRAM handle state
|
|||
* @param __HANDLE__ SRAM handle |
|||
* @retval None |
|||
*/ |
|||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) |
|||
#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) do { \ |
|||
(__HANDLE__)->State = HAL_SRAM_STATE_RESET; \ |
|||
(__HANDLE__)->MspInitCallback = NULL; \ |
|||
(__HANDLE__)->MspDeInitCallback = NULL; \ |
|||
} while(0) |
|||
#else |
|||
#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET) |
|||
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported functions --------------------------------------------------------*/ |
|||
/** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Initialization/de-initialization functions ********************************/ |
|||
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, |
|||
FMC_NORSRAM_TimingTypeDef *ExtTiming); |
|||
HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram); |
|||
void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram); |
|||
void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram); |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* I/O operation functions ***************************************************/ |
|||
HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, |
|||
uint32_t BufferSize); |
|||
HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, |
|||
uint32_t BufferSize); |
|||
HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, |
|||
uint32_t BufferSize); |
|||
HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, |
|||
uint32_t BufferSize); |
|||
HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, |
|||
uint32_t BufferSize); |
|||
HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, |
|||
uint32_t BufferSize); |
|||
HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, |
|||
uint32_t BufferSize); |
|||
HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, |
|||
uint32_t BufferSize); |
|||
|
|||
void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); |
|||
void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); |
|||
|
|||
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1) |
|||
/* SRAM callback registering/unregistering */ |
|||
HAL_StatusTypeDef HAL_SRAM_RegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, |
|||
pSRAM_CallbackTypeDef pCallback); |
|||
HAL_StatusTypeDef HAL_SRAM_UnRegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId); |
|||
HAL_StatusTypeDef HAL_SRAM_RegisterDmaCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId, |
|||
pSRAM_DmaCallbackTypeDef pCallback); |
|||
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup SRAM_Exported_Functions_Group3 Control functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* SRAM Control functions ****************************************************/ |
|||
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram); |
|||
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram); |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* SRAM State functions ******************************************************/ |
|||
HAL_SRAM_StateTypeDef HAL_SRAM_GetState(const SRAM_HandleTypeDef *hsram); |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
#endif /* FMC_Bank1 || FSMC_Bank1 */ |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
#endif /* STM32F4xx_HAL_SRAM_H */ |
|||
@ -0,0 +1,909 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32f4xx_hal_uart.h |
|||
* @author MCD Application Team |
|||
* @brief Header file of UART HAL module. |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* Copyright (c) 2016 STMicroelectronics. |
|||
* All rights reserved. |
|||
* |
|||
* This software is licensed under terms that can be found in the LICENSE file |
|||
* in the root directory of this software component. |
|||
* If no LICENSE file comes with this software, it is provided AS-IS. |
|||
* |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Define to prevent recursive inclusion -------------------------------------*/ |
|||
#ifndef __STM32F4xx_HAL_UART_H |
|||
#define __STM32F4xx_HAL_UART_H |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#include "stm32f4xx_hal_def.h" |
|||
|
|||
/** @addtogroup STM32F4xx_HAL_Driver
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup UART
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Exported types ------------------------------------------------------------*/ |
|||
/** @defgroup UART_Exported_Types UART Exported Types
|
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @brief UART Init Structure definition |
|||
*/ |
|||
typedef struct |
|||
{ |
|||
uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
|
|||
The baud rate is computed using the following formula: |
|||
- IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate))) |
|||
- FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5 |
|||
Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */ |
|||
|
|||
uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
|||
This parameter can be a value of @ref UART_Word_Length */ |
|||
|
|||
uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
|
|||
This parameter can be a value of @ref UART_Stop_Bits */ |
|||
|
|||
uint32_t Parity; /*!< Specifies the parity mode.
|
|||
This parameter can be a value of @ref UART_Parity |
|||
@note When parity is enabled, the computed parity is inserted |
|||
at the MSB position of the transmitted data (9th bit when |
|||
the word length is set to 9 data bits; 8th bit when the |
|||
word length is set to 8 data bits). */ |
|||
|
|||
uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
|
|||
This parameter can be a value of @ref UART_Mode */ |
|||
|
|||
uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
|
|||
This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
|||
|
|||
uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
|
|||
This parameter can be a value of @ref UART_Over_Sampling */ |
|||
} UART_InitTypeDef; |
|||
|
|||
/**
|
|||
* @brief HAL UART State structures definition |
|||
* @note HAL UART State value is a combination of 2 different substates: gState and RxState. |
|||
* - gState contains UART state information related to global Handle management |
|||
* and also information related to Tx operations. |
|||
* gState value coding follow below described bitmap : |
|||
* b7-b6 Error information |
|||
* 00 : No Error |
|||
* 01 : (Not Used) |
|||
* 10 : Timeout |
|||
* 11 : Error |
|||
* b5 Peripheral initialization status |
|||
* 0 : Reset (Peripheral not initialized) |
|||
* 1 : Init done (Peripheral initialized. HAL UART Init function already called) |
|||
* b4-b3 (not used) |
|||
* xx : Should be set to 00 |
|||
* b2 Intrinsic process state |
|||
* 0 : Ready |
|||
* 1 : Busy (Peripheral busy with some configuration or internal operations) |
|||
* b1 (not used) |
|||
* x : Should be set to 0 |
|||
* b0 Tx state |
|||
* 0 : Ready (no Tx operation ongoing) |
|||
* 1 : Busy (Tx operation ongoing) |
|||
* - RxState contains information related to Rx operations. |
|||
* RxState value coding follow below described bitmap : |
|||
* b7-b6 (not used) |
|||
* xx : Should be set to 00 |
|||
* b5 Peripheral initialization status |
|||
* 0 : Reset (Peripheral not initialized) |
|||
* 1 : Init done (Peripheral initialized) |
|||
* b4-b2 (not used) |
|||
* xxx : Should be set to 000 |
|||
* b1 Rx state |
|||
* 0 : Ready (no Rx operation ongoing) |
|||
* 1 : Busy (Rx operation ongoing) |
|||
* b0 (not used) |
|||
* x : Should be set to 0. |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
|
|||
Value is allowed for gState and RxState */ |
|||
HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
|
|||
Value is allowed for gState and RxState */ |
|||
HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
|
|||
Value is allowed for gState only */ |
|||
HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
|
|||
Value is allowed for gState only */ |
|||
HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
|
|||
Value is allowed for RxState only */ |
|||
HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
|
|||
Not to be used for neither gState nor RxState. |
|||
Value is result of combination (Or) between gState and RxState values */ |
|||
HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
|
|||
Value is allowed for gState only */ |
|||
HAL_UART_STATE_ERROR = 0xE0U /*!< Error
|
|||
Value is allowed for gState only */ |
|||
} HAL_UART_StateTypeDef; |
|||
|
|||
/**
|
|||
* @brief HAL UART Reception type definition |
|||
* @note HAL UART Reception type value aims to identify which type of Reception is ongoing. |
|||
* This parameter can be a value of @ref UART_Reception_Type_Values : |
|||
* HAL_UART_RECEPTION_STANDARD = 0x00U, |
|||
* HAL_UART_RECEPTION_TOIDLE = 0x01U, |
|||
*/ |
|||
typedef uint32_t HAL_UART_RxTypeTypeDef; |
|||
|
|||
/**
|
|||
* @brief HAL UART Rx Event type definition |
|||
* @note HAL UART Rx Event type value aims to identify which type of Event has occurred |
|||
* leading to call of the RxEvent callback. |
|||
* This parameter can be a value of @ref UART_RxEvent_Type_Values : |
|||
* HAL_UART_RXEVENT_TC = 0x00U, |
|||
* HAL_UART_RXEVENT_HT = 0x01U, |
|||
* HAL_UART_RXEVENT_IDLE = 0x02U, |
|||
*/ |
|||
typedef uint32_t HAL_UART_RxEventTypeTypeDef; |
|||
|
|||
/**
|
|||
* @brief UART handle Structure definition |
|||
*/ |
|||
typedef struct __UART_HandleTypeDef |
|||
{ |
|||
USART_TypeDef *Instance; /*!< UART registers base address */ |
|||
|
|||
UART_InitTypeDef Init; /*!< UART communication parameters */ |
|||
|
|||
const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
|||
|
|||
uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
|||
|
|||
__IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
|||
|
|||
uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
|||
|
|||
uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
|||
|
|||
__IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
|||
|
|||
__IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ |
|||
|
|||
__IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ |
|||
|
|||
DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
|||
|
|||
DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
|||
|
|||
HAL_LockTypeDef Lock; /*!< Locking object */ |
|||
|
|||
__IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
|
|||
and also related to Tx operations. |
|||
This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
|||
|
|||
__IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
|
|||
This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
|||
|
|||
__IO uint32_t ErrorCode; /*!< UART Error code */ |
|||
|
|||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
|||
void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ |
|||
void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ |
|||
void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ |
|||
void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ |
|||
void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ |
|||
void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ |
|||
void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ |
|||
void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ |
|||
void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ |
|||
void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ |
|||
|
|||
void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ |
|||
void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ |
|||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
|||
|
|||
} UART_HandleTypeDef; |
|||
|
|||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
|||
/**
|
|||
* @brief HAL UART Callback ID enumeration definition |
|||
*/ |
|||
typedef enum |
|||
{ |
|||
HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ |
|||
HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ |
|||
HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ |
|||
HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ |
|||
HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ |
|||
HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ |
|||
HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ |
|||
HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ |
|||
HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ |
|||
|
|||
HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ |
|||
HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ |
|||
|
|||
} HAL_UART_CallbackIDTypeDef; |
|||
|
|||
/**
|
|||
* @brief HAL UART Callback pointer definition |
|||
*/ |
|||
typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ |
|||
typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ |
|||
|
|||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported constants --------------------------------------------------------*/ |
|||
/** @defgroup UART_Exported_Constants UART Exported Constants
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @defgroup UART_Error_Code UART Error Code
|
|||
* @{ |
|||
*/ |
|||
#define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ |
|||
#define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ |
|||
#define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ |
|||
#define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ |
|||
#define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ |
|||
#define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
|||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
|||
#define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */ |
|||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_Word_Length UART Word Length
|
|||
* @{ |
|||
*/ |
|||
#define UART_WORDLENGTH_8B 0x00000000U |
|||
#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_Stop_Bits UART Number of Stop Bits
|
|||
* @{ |
|||
*/ |
|||
#define UART_STOPBITS_1 0x00000000U |
|||
#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_Parity UART Parity
|
|||
* @{ |
|||
*/ |
|||
#define UART_PARITY_NONE 0x00000000U |
|||
#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
|||
#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
|
|||
* @{ |
|||
*/ |
|||
#define UART_HWCONTROL_NONE 0x00000000U |
|||
#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
|||
#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
|||
#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_Mode UART Transfer Mode
|
|||
* @{ |
|||
*/ |
|||
#define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
|||
#define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
|||
#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE)) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_State UART State
|
|||
* @{ |
|||
*/ |
|||
#define UART_STATE_DISABLE 0x00000000U |
|||
#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_Over_Sampling UART Over Sampling
|
|||
* @{ |
|||
*/ |
|||
#define UART_OVERSAMPLING_16 0x00000000U |
|||
#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
|
|||
* @{ |
|||
*/ |
|||
#define UART_LINBREAKDETECTLENGTH_10B 0x00000000U |
|||
#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_WakeUp_functions UART Wakeup Functions
|
|||
* @{ |
|||
*/ |
|||
#define UART_WAKEUPMETHOD_IDLELINE 0x00000000U |
|||
#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_Flags UART FLags
|
|||
* Elements values convention: 0xXXXX |
|||
* - 0xXXXX : Flag mask in the SR register |
|||
* @{ |
|||
*/ |
|||
#define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
|||
#define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
|||
#define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
|||
#define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
|||
#define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
|||
#define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
|||
#define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
|||
#define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
|||
#define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
|||
#define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_Interrupt_definition UART Interrupt Definitions
|
|||
* Elements values convention: 0xY000XXXX |
|||
* - XXXX : Interrupt mask (16 bits) in the Y register |
|||
* - Y : Interrupt source register (2bits) |
|||
* - 0001: CR1 register |
|||
* - 0010: CR2 register |
|||
* - 0011: CR3 register |
|||
* @{ |
|||
*/ |
|||
|
|||
#define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
|||
#define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
|||
#define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
|||
#define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
|||
#define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
|||
|
|||
#define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
|||
|
|||
#define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
|||
#define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_Reception_Type_Values UART Reception type values
|
|||
* @{ |
|||
*/ |
|||
#define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ |
|||
#define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup UART_RxEvent_Type_Values UART RxEvent type values
|
|||
* @{ |
|||
*/ |
|||
#define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ |
|||
#define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ |
|||
#define HAL_UART_RXEVENT_IDLE (0x00000002U) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported macro ------------------------------------------------------------*/ |
|||
/** @defgroup UART_Exported_Macros UART Exported Macros
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @brief Reset UART handle gstate & RxState
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
* @retval None |
|||
*/ |
|||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
|||
#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
|||
(__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
|||
(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
|||
(__HANDLE__)->MspInitCallback = NULL; \ |
|||
(__HANDLE__)->MspDeInitCallback = NULL; \ |
|||
} while(0U) |
|||
#else |
|||
#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
|||
(__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
|||
(__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
|||
} while(0U) |
|||
#endif /*USE_HAL_UART_REGISTER_CALLBACKS */ |
|||
|
|||
/** @brief Flushes the UART DR register
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
*/ |
|||
#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
|||
|
|||
/** @brief Checks whether the specified UART flag is set or not.
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
* @param __FLAG__ specifies the flag to check. |
|||
* This parameter can be one of the following values: |
|||
* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
|||
* @arg UART_FLAG_LBD: LIN Break detection flag |
|||
* @arg UART_FLAG_TXE: Transmit data register empty flag |
|||
* @arg UART_FLAG_TC: Transmission Complete flag |
|||
* @arg UART_FLAG_RXNE: Receive data register not empty flag |
|||
* @arg UART_FLAG_IDLE: Idle Line detection flag |
|||
* @arg UART_FLAG_ORE: Overrun Error flag |
|||
* @arg UART_FLAG_NE: Noise Error flag |
|||
* @arg UART_FLAG_FE: Framing Error flag |
|||
* @arg UART_FLAG_PE: Parity Error flag |
|||
* @retval The new state of __FLAG__ (TRUE or FALSE). |
|||
*/ |
|||
#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
|||
|
|||
/** @brief Clears the specified UART pending flag.
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
* @param __FLAG__ specifies the flag to check. |
|||
* This parameter can be any combination of the following values: |
|||
* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
|||
* @arg UART_FLAG_LBD: LIN Break detection flag. |
|||
* @arg UART_FLAG_TC: Transmission Complete flag. |
|||
* @arg UART_FLAG_RXNE: Receive data register not empty flag. |
|||
* |
|||
* @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun |
|||
* error) and IDLE (Idle line detected) flags are cleared by software |
|||
* sequence: a read operation to USART_SR register followed by a read |
|||
* operation to USART_DR register. |
|||
* @note RXNE flag can be also cleared by a read to the USART_DR register. |
|||
* @note TC flag can be also cleared by software sequence: a read operation to |
|||
* USART_SR register followed by a write operation to USART_DR register. |
|||
* @note TXE flag is cleared only by a write to the USART_DR register. |
|||
* |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
|||
|
|||
/** @brief Clears the UART PE pending flag.
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
|||
do{ \ |
|||
__IO uint32_t tmpreg = 0x00U; \ |
|||
tmpreg = (__HANDLE__)->Instance->SR; \ |
|||
tmpreg = (__HANDLE__)->Instance->DR; \ |
|||
UNUSED(tmpreg); \ |
|||
} while(0U) |
|||
|
|||
/** @brief Clears the UART FE pending flag.
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
|||
|
|||
/** @brief Clears the UART NE pending flag.
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
|||
|
|||
/** @brief Clears the UART ORE pending flag.
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
|||
|
|||
/** @brief Clears the UART IDLE pending flag.
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
|||
|
|||
/** @brief Enable the specified UART interrupt.
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
* @param __INTERRUPT__ specifies the UART interrupt source to enable. |
|||
* This parameter can be one of the following values: |
|||
* @arg UART_IT_CTS: CTS change interrupt |
|||
* @arg UART_IT_LBD: LIN Break detection interrupt |
|||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt |
|||
* @arg UART_IT_TC: Transmission complete interrupt |
|||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt |
|||
* @arg UART_IT_IDLE: Idle line detection interrupt |
|||
* @arg UART_IT_PE: Parity Error interrupt |
|||
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
|||
(((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
|||
((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
|||
|
|||
/** @brief Disable the specified UART interrupt.
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
* @param __INTERRUPT__ specifies the UART interrupt source to disable. |
|||
* This parameter can be one of the following values: |
|||
* @arg UART_IT_CTS: CTS change interrupt |
|||
* @arg UART_IT_LBD: LIN Break detection interrupt |
|||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt |
|||
* @arg UART_IT_TC: Transmission complete interrupt |
|||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt |
|||
* @arg UART_IT_IDLE: Idle line detection interrupt |
|||
* @arg UART_IT_PE: Parity Error interrupt |
|||
* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
|||
(((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
|||
((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
|||
|
|||
/** @brief Checks whether the specified UART interrupt source is enabled or not.
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* UART Handle selects the USARTx or UARTy peripheral |
|||
* (USART,UART availability and x,y values depending on device). |
|||
* @param __IT__ specifies the UART interrupt source to check. |
|||
* This parameter can be one of the following values: |
|||
* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
|||
* @arg UART_IT_LBD: LIN Break detection interrupt |
|||
* @arg UART_IT_TXE: Transmit Data Register empty interrupt |
|||
* @arg UART_IT_TC: Transmission complete interrupt |
|||
* @arg UART_IT_RXNE: Receive Data register not empty interrupt |
|||
* @arg UART_IT_IDLE: Idle line detection interrupt |
|||
* @arg UART_IT_ERR: Error interrupt |
|||
* @retval The new state of __IT__ (TRUE or FALSE). |
|||
*/ |
|||
#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \ |
|||
(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
|||
|
|||
/** @brief Enable CTS flow control
|
|||
* @note This macro allows to enable CTS hardware flow control for a given UART instance, |
|||
* without need to call HAL_UART_Init() function. |
|||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
|||
* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
|||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
|||
* - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
|||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
|||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
|||
* It is used to select the USART peripheral (USART availability and x value depending on device). |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
|||
do{ \ |
|||
ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
|||
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
|||
} while(0U) |
|||
|
|||
/** @brief Disable CTS flow control
|
|||
* @note This macro allows to disable CTS hardware flow control for a given UART instance, |
|||
* without need to call HAL_UART_Init() function. |
|||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
|||
* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
|||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
|||
* - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
|||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
|||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
|||
* It is used to select the USART peripheral (USART availability and x value depending on device). |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
|||
do{ \ |
|||
ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
|||
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
|||
} while(0U) |
|||
|
|||
/** @brief Enable RTS flow control
|
|||
* This macro allows to enable RTS hardware flow control for a given UART instance, |
|||
* without need to call HAL_UART_Init() function. |
|||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
|||
* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
|||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
|||
* - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
|||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
|||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
|||
* It is used to select the USART peripheral (USART availability and x value depending on device). |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
|||
do{ \ |
|||
ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
|||
(__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
|||
} while(0U) |
|||
|
|||
/** @brief Disable RTS flow control
|
|||
* This macro allows to disable RTS hardware flow control for a given UART instance, |
|||
* without need to call HAL_UART_Init() function. |
|||
* As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
|||
* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
|||
* for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
|||
* - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
|||
* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
|||
* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
|||
* It is used to select the USART peripheral (USART availability and x value depending on device). |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
|||
do{ \ |
|||
ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
|||
(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
|||
} while(0U) |
|||
|
|||
/** @brief Macro to enable the UART's one bit sample method
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
|||
|
|||
/** @brief Macro to disable the UART's one bit sample method
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\ |
|||
&= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
|||
|
|||
/** @brief Enable UART
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
|||
|
|||
/** @brief Disable UART
|
|||
* @param __HANDLE__ specifies the UART Handle. |
|||
* @retval None |
|||
*/ |
|||
#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Exported functions --------------------------------------------------------*/ |
|||
/** @addtogroup UART_Exported_Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* Initialization/de-initialization functions **********************************/ |
|||
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
|||
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
|||
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); |
|||
void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
|||
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
|||
|
|||
/* Callbacks Register/UnRegister functions ***********************************/ |
|||
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
|||
HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, |
|||
pUART_CallbackTypeDef pCallback); |
|||
HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); |
|||
|
|||
HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); |
|||
HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); |
|||
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/* IO operation functions *******************************************************/ |
|||
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); |
|||
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
|||
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
|||
|
|||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, |
|||
uint32_t Timeout); |
|||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
|||
|
|||
HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart); |
|||
|
|||
/* Transfer Abort functions */ |
|||
HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
|||
|
|||
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
|||
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
|||
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
|||
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
|||
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
|||
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
|||
void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); |
|||
void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); |
|||
void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); |
|||
|
|||
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup UART_Exported_Functions_Group3
|
|||
* @{ |
|||
*/ |
|||
/* Peripheral Control functions ************************************************/ |
|||
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
|||
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @addtogroup UART_Exported_Functions_Group4
|
|||
* @{ |
|||
*/ |
|||
/* Peripheral State functions **************************************************/ |
|||
HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); |
|||
uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
/* Private types -------------------------------------------------------------*/ |
|||
/* Private variables ---------------------------------------------------------*/ |
|||
/* Private constants ---------------------------------------------------------*/ |
|||
/** @defgroup UART_Private_Constants UART Private Constants
|
|||
* @{ |
|||
*/ |
|||
/** @brief UART interruptions flag mask
|
|||
* |
|||
*/ |
|||
#define UART_IT_MASK 0x0000FFFFU |
|||
|
|||
#define UART_CR1_REG_INDEX 1U |
|||
#define UART_CR2_REG_INDEX 2U |
|||
#define UART_CR3_REG_INDEX 3U |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private macros ------------------------------------------------------------*/ |
|||
/** @defgroup UART_Private_Macros UART Private Macros
|
|||
* @{ |
|||
*/ |
|||
#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
|||
((LENGTH) == UART_WORDLENGTH_9B)) |
|||
#define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) |
|||
#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
|||
((STOPBITS) == UART_STOPBITS_2)) |
|||
#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
|||
((PARITY) == UART_PARITY_EVEN) || \ |
|||
((PARITY) == UART_PARITY_ODD)) |
|||
#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
|||
(((CONTROL) == UART_HWCONTROL_NONE) || \ |
|||
((CONTROL) == UART_HWCONTROL_RTS) || \ |
|||
((CONTROL) == UART_HWCONTROL_CTS) || \ |
|||
((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
|||
#define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) |
|||
#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
|||
((STATE) == UART_STATE_ENABLE)) |
|||
#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
|||
((SAMPLING) == UART_OVERSAMPLING_8)) |
|||
#define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) |
|||
#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
|||
((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
|||
#define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
|||
((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
|||
#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 10500000U) |
|||
#define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) |
|||
|
|||
#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) ((uint32_t)((((uint64_t)(_PCLK_))*25U)/(4U*((uint64_t)(_BAUD_))))) |
|||
#define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) |
|||
#define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U)\ |
|||
+ 50U) / 100U) |
|||
/* UART BRR = mantissa + overflow + fraction
|
|||
= (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
|||
#define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ |
|||
(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U) + \ |
|||
(UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) |
|||
|
|||
#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) ((uint32_t)((((uint64_t)(_PCLK_))*25U)/(2U*((uint64_t)(_BAUD_))))) |
|||
#define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) |
|||
#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U)\ |
|||
+ 50U) / 100U) |
|||
/* UART BRR = mantissa + overflow + fraction
|
|||
= (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ |
|||
#define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) ((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ |
|||
((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U) + \ |
|||
(UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private functions ---------------------------------------------------------*/ |
|||
/** @defgroup UART_Private_Functions UART Private Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
|||
HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
|
|||
#endif /* __STM32F4xx_HAL_UART_H */ |
|||
|
|||
File diff suppressed because it is too large
File diff suppressed because it is too large
File diff suppressed because it is too large
File diff suppressed because it is too large
@ -0,0 +1,961 @@ |
|||
/**
|
|||
****************************************************************************** |
|||
* @file stm32f4xx_hal_pccard.c |
|||
* @author MCD Application Team |
|||
* @brief PCCARD HAL module driver. |
|||
* This file provides a generic firmware to drive PCCARD memories mounted |
|||
* as external device. |
|||
* |
|||
****************************************************************************** |
|||
* @attention |
|||
* |
|||
* Copyright (c) 2016 STMicroelectronics. |
|||
* All rights reserved. |
|||
* |
|||
* This software is licensed under terms that can be found in the LICENSE file |
|||
* in the root directory of this software component. |
|||
* If no LICENSE file comes with this software, it is provided AS-IS. |
|||
* |
|||
****************************************************************************** |
|||
@verbatim |
|||
=============================================================================== |
|||
##### How to use this driver ##### |
|||
=============================================================================== |
|||
[..] |
|||
This driver is a generic layered driver which contains a set of APIs used to |
|||
control PCCARD/compact flash memories. It uses the FMC/FSMC layer functions |
|||
to interface with PCCARD devices. This driver is used for: |
|||
|
|||
(+) PCCARD/Compact Flash memory configuration sequence using the function |
|||
HAL_PCCARD_Init()/HAL_CF_Init() with control and timing parameters for |
|||
both common and attribute spaces. |
|||
|
|||
(+) Read PCCARD/Compact Flash memory maker and device IDs using the function |
|||
HAL_PCCARD_Read_ID()/HAL_CF_Read_ID(). The read information is stored in |
|||
the CompactFlash_ID structure declared by the function caller. |
|||
|
|||
(+) Access PCCARD/Compact Flash memory by read/write operations using the functions |
|||
HAL_PCCARD_Read_Sector()/ HAL_PCCARD_Write_Sector() - |
|||
HAL_CF_Read_Sector()/HAL_CF_Write_Sector(), to read/write sector. |
|||
|
|||
(+) Perform PCCARD/Compact Flash Reset chip operation using the function |
|||
HAL_PCCARD_Reset()/HAL_CF_Reset. |
|||
|
|||
(+) Perform PCCARD/Compact Flash erase sector operation using the function |
|||
HAL_PCCARD_Erase_Sector()/HAL_CF_Erase_Sector. |
|||
|
|||
(+) Read the PCCARD/Compact Flash status operation using the function |
|||
HAL_PCCARD_ReadStatus()/HAL_CF_ReadStatus(). |
|||
|
|||
(+) You can monitor the PCCARD/Compact Flash device HAL state by calling |
|||
the function HAL_PCCARD_GetState()/HAL_CF_GetState() |
|||
|
|||
[..] |
|||
(@) This driver is a set of generic APIs which handle standard PCCARD/compact flash |
|||
operations. If a PCCARD/Compact Flash device contains different operations |
|||
and/or implementations, it should be implemented separately. |
|||
|
|||
*** Callback registration *** |
|||
============================================= |
|||
[..] |
|||
The compilation define USE_HAL_PCCARD_REGISTER_CALLBACKS when set to 1 |
|||
allows the user to configure dynamically the driver callbacks. |
|||
|
|||
Use Functions HAL_PCCARD_RegisterCallback() to register a user callback, |
|||
it allows to register following callbacks: |
|||
(+) MspInitCallback : PCCARD MspInit. |
|||
(+) MspDeInitCallback : PCCARD MspDeInit. |
|||
This function takes as parameters the HAL peripheral handle, the Callback ID |
|||
and a pointer to the user callback function. |
|||
|
|||
Use function HAL_PCCARD_UnRegisterCallback() to reset a callback to the default |
|||
weak (surcharged) function. It allows to reset following callbacks: |
|||
(+) MspInitCallback : PCCARD MspInit. |
|||
(+) MspDeInitCallback : PCCARD MspDeInit. |
|||
This function) takes as parameters the HAL peripheral handle and the Callback ID. |
|||
|
|||
By default, after the HAL_PCCARD_Init and if the state is HAL_PCCARD_STATE_RESET |
|||
all callbacks are reset to the corresponding legacy weak (surcharged) functions. |
|||
Exception done for MspInit and MspDeInit callbacks that are respectively |
|||
reset to the legacy weak (surcharged) functions in the HAL_PCCARD_Init |
|||
and HAL_PCCARD_DeInit only when these callbacks are null (not registered beforehand). |
|||
If not, MspInit or MspDeInit are not null, the HAL_PCCARD_Init and HAL_PCCARD_DeInit |
|||
keep and use the user MspInit/MspDeInit callbacks (registered beforehand) |
|||
|
|||
Callbacks can be registered/unregistered in READY state only. |
|||
Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered |
|||
in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used |
|||
during the Init/DeInit. |
|||
In that case first register the MspInit/MspDeInit user callbacks |
|||
using HAL_PCCARD_RegisterCallback before calling HAL_PCCARD_DeInit |
|||
or HAL_PCCARD_Init function. |
|||
|
|||
When The compilation define USE_HAL_PCCARD_REGISTER_CALLBACKS is set to 0 or |
|||
not defined, the callback registering feature is not available |
|||
and weak (surcharged) callbacks are used. |
|||
|
|||
@endverbatim |
|||
****************************************************************************** |
|||
*/ |
|||
|
|||
/* Includes ------------------------------------------------------------------*/ |
|||
#include "stm32f4xx_hal.h" |
|||
|
|||
#if defined(FMC_Bank4) || defined(FSMC_Bank4) |
|||
|
|||
/** @addtogroup STM32F4xx_HAL_Driver
|
|||
* @{ |
|||
*/ |
|||
|
|||
#ifdef HAL_PCCARD_MODULE_ENABLED |
|||
|
|||
/** @defgroup PCCARD PCCARD
|
|||
* @brief PCCARD HAL module driver |
|||
* @{ |
|||
*/ |
|||
/* Private typedef -----------------------------------------------------------*/ |
|||
/* Private define ------------------------------------------------------------*/ |
|||
|
|||
/** @defgroup PCCARD_Private_Defines PCCARD Private Defines
|
|||
* @{ |
|||
*/ |
|||
#define PCCARD_TIMEOUT_READ_ID 0x0000FFFFU |
|||
#define PCCARD_TIMEOUT_READ_WRITE_SECTOR 0x0000FFFFU |
|||
#define PCCARD_TIMEOUT_ERASE_SECTOR 0x00000400U |
|||
#define PCCARD_TIMEOUT_STATUS 0x01000000U |
|||
|
|||
#define PCCARD_STATUS_OK (uint8_t)0x58 |
|||
#define PCCARD_STATUS_WRITE_OK (uint8_t)0x50 |
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/* Private macro -------------------------------------------------------------*/ |
|||
/* Private variables ---------------------------------------------------------*/ |
|||
/* Private function ----------------------------------------------------------*/ |
|||
/* Exported functions --------------------------------------------------------*/ |
|||
/** @defgroup PCCARD_Exported_Functions PCCARD Exported Functions
|
|||
* @{ |
|||
*/ |
|||
|
|||
/** @defgroup PCCARD_Exported_Functions_Group1 Initialization and de-initialization functions
|
|||
* @brief Initialization and Configuration functions |
|||
* |
|||
@verbatim |
|||
============================================================================== |
|||
##### PCCARD Initialization and de-initialization functions ##### |
|||
============================================================================== |
|||
[..] |
|||
This section provides functions allowing to initialize/de-initialize |
|||
the PCCARD memory |
|||
|
|||
@endverbatim |
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @brief Perform the PCCARD memory Initialization sequence |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @param ComSpaceTiming Common space timing structure |
|||
* @param AttSpaceTiming Attribute space timing structure |
|||
* @param IOSpaceTiming IO space timing structure |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, |
|||
FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, |
|||
FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming) |
|||
{ |
|||
/* Check the PCCARD controller state */ |
|||
if (hpccard == NULL) |
|||
{ |
|||
return HAL_ERROR; |
|||
} |
|||
|
|||
if (hpccard->State == HAL_PCCARD_STATE_RESET) |
|||
{ |
|||
/* Allocate lock resource and initialize it */ |
|||
hpccard->Lock = HAL_UNLOCKED; |
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
if (hpccard->MspInitCallback == NULL) |
|||
{ |
|||
hpccard->MspInitCallback = HAL_PCCARD_MspInit; |
|||
} |
|||
hpccard->ItCallback = HAL_PCCARD_ITCallback; |
|||
|
|||
/* Init the low level hardware */ |
|||
hpccard->MspInitCallback(hpccard); |
|||
#else |
|||
/* Initialize the low level hardware (MSP) */ |
|||
HAL_PCCARD_MspInit(hpccard); |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
} |
|||
|
|||
/* Initialize the PCCARD state */ |
|||
hpccard->State = HAL_PCCARD_STATE_BUSY; |
|||
|
|||
/* Initialize PCCARD control Interface */ |
|||
FMC_PCCARD_Init(hpccard->Instance, &(hpccard->Init)); |
|||
|
|||
/* Init PCCARD common space timing Interface */ |
|||
FMC_PCCARD_CommonSpace_Timing_Init(hpccard->Instance, ComSpaceTiming); |
|||
|
|||
/* Init PCCARD attribute space timing Interface */ |
|||
FMC_PCCARD_AttributeSpace_Timing_Init(hpccard->Instance, AttSpaceTiming); |
|||
|
|||
/* Init PCCARD IO space timing Interface */ |
|||
FMC_PCCARD_IOSpace_Timing_Init(hpccard->Instance, IOSpaceTiming); |
|||
|
|||
/* Enable the PCCARD device */ |
|||
__FMC_PCCARD_ENABLE(hpccard->Instance); |
|||
|
|||
/* Update the PCCARD state */ |
|||
hpccard->State = HAL_PCCARD_STATE_READY; |
|||
|
|||
return HAL_OK; |
|||
|
|||
} |
|||
|
|||
/**
|
|||
* @brief Perform the PCCARD memory De-initialization sequence |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCCARD_DeInit(PCCARD_HandleTypeDef *hpccard) |
|||
{ |
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
if (hpccard->MspDeInitCallback == NULL) |
|||
{ |
|||
hpccard->MspDeInitCallback = HAL_PCCARD_MspDeInit; |
|||
} |
|||
|
|||
/* DeInit the low level hardware */ |
|||
hpccard->MspDeInitCallback(hpccard); |
|||
#else |
|||
/* De-Initialize the low level hardware (MSP) */ |
|||
HAL_PCCARD_MspDeInit(hpccard); |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
|
|||
/* Configure the PCCARD registers with their reset values */ |
|||
FMC_PCCARD_DeInit(hpccard->Instance); |
|||
|
|||
/* Update the PCCARD controller state */ |
|||
hpccard->State = HAL_PCCARD_STATE_RESET; |
|||
|
|||
/* Release Lock */ |
|||
__HAL_UNLOCK(hpccard); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief PCCARD MSP Init |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @retval None |
|||
*/ |
|||
__weak void HAL_PCCARD_MspInit(PCCARD_HandleTypeDef *hpccard) |
|||
{ |
|||
/* Prevent unused argument(s) compilation warning */ |
|||
UNUSED(hpccard); |
|||
/* NOTE : This function Should not be modified, when the callback is needed,
|
|||
the HAL_PCCARD_MspInit could be implemented in the user file |
|||
*/ |
|||
} |
|||
|
|||
/**
|
|||
* @brief PCCARD MSP DeInit |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @retval None |
|||
*/ |
|||
__weak void HAL_PCCARD_MspDeInit(PCCARD_HandleTypeDef *hpccard) |
|||
{ |
|||
/* Prevent unused argument(s) compilation warning */ |
|||
UNUSED(hpccard); |
|||
/* NOTE : This function Should not be modified, when the callback is needed,
|
|||
the HAL_PCCARD_MspDeInit could be implemented in the user file |
|||
*/ |
|||
} |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup PCCARD_Exported_Functions_Group2 Input and Output functions
|
|||
* @brief Input Output and memory control functions |
|||
* |
|||
@verbatim |
|||
============================================================================== |
|||
##### PCCARD Input and Output functions ##### |
|||
============================================================================== |
|||
[..] |
|||
This section provides functions allowing to use and control the PCCARD memory |
|||
|
|||
@endverbatim |
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @brief Read Compact Flash's ID. |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @param CompactFlash_ID Compact flash ID structure. |
|||
* @param pStatus pointer to compact flash status |
|||
* @retval HAL status |
|||
* |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCCARD_Read_ID(PCCARD_HandleTypeDef *hpccard, uint8_t CompactFlash_ID[], uint8_t *pStatus) |
|||
{ |
|||
uint32_t timeout = 0U; |
|||
uint32_t index = 0U; |
|||
uint8_t status = 0U; |
|||
|
|||
/* Process Locked */ |
|||
__HAL_LOCK(hpccard); |
|||
|
|||
/* Check the PCCARD controller state */ |
|||
if (hpccard->State == HAL_PCCARD_STATE_BUSY) |
|||
{ |
|||
return HAL_BUSY; |
|||
} |
|||
|
|||
/* Initialize timeout value */ |
|||
timeout = PCCARD_TIMEOUT_READ_ID; |
|||
|
|||
/* Update the PCCARD controller state */ |
|||
hpccard->State = HAL_PCCARD_STATE_BUSY; |
|||
|
|||
/* Initialize the PCCARD status */ |
|||
*pStatus = PCCARD_READY; |
|||
|
|||
/* Send the Identify Command */ |
|||
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD) = (uint16_t)0xECEC; |
|||
|
|||
/* Read PCCARD IDs and timeout treatment */ |
|||
do |
|||
{ |
|||
/* Read the PCCARD status */ |
|||
status = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE); |
|||
|
|||
timeout--; |
|||
} while ((status != PCCARD_STATUS_OK) && timeout); |
|||
|
|||
if (timeout == 0U) |
|||
{ |
|||
*pStatus = PCCARD_TIMEOUT_ERROR; |
|||
} |
|||
else |
|||
{ |
|||
/* Read PCCARD ID bytes */ |
|||
for (index = 0U; index < 16U; index++) |
|||
{ |
|||
CompactFlash_ID[index] = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_DATA); |
|||
} |
|||
} |
|||
|
|||
/* Update the PCCARD controller state */ |
|||
hpccard->State = HAL_PCCARD_STATE_READY; |
|||
|
|||
/* Process unlocked */ |
|||
__HAL_UNLOCK(hpccard); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief Read sector from PCCARD memory |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @param pBuffer pointer to destination read buffer |
|||
* @param SectorAddress Sector address to read |
|||
* @param pStatus pointer to PCCARD status |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCCARD_Read_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress, |
|||
uint8_t *pStatus) |
|||
{ |
|||
uint32_t timeout = 0U; |
|||
uint32_t index = 0U; |
|||
uint8_t status = 0U; |
|||
|
|||
/* Process Locked */ |
|||
__HAL_LOCK(hpccard); |
|||
|
|||
/* Check the PCCARD controller state */ |
|||
if (hpccard->State == HAL_PCCARD_STATE_BUSY) |
|||
{ |
|||
return HAL_BUSY; |
|||
} |
|||
|
|||
/* Initialize timeout value */ |
|||
timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR; |
|||
|
|||
/* Update the PCCARD controller state */ |
|||
hpccard->State = HAL_PCCARD_STATE_BUSY; |
|||
|
|||
/* Initialize PCCARD status */ |
|||
*pStatus = PCCARD_READY; |
|||
|
|||
/* Set the parameters to write a sector */ |
|||
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_CYLINDER_HIGH) = (uint16_t)0x0000; |
|||
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_SECTOR_COUNT) = ((uint16_t)0x0100) | ((uint16_t)SectorAddress); |
|||
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD) = (uint16_t)0xE4A0; |
|||
|
|||
do |
|||
{ |
|||
/* wait till the Status = 0x80 */ |
|||
status = *(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE); |
|||
timeout--; |
|||
} while ((status == 0x80U) && timeout); |
|||
|
|||
if (timeout == 0U) |
|||
{ |
|||
*pStatus = PCCARD_TIMEOUT_ERROR; |
|||
} |
|||
|
|||
timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR; |
|||
|
|||
do |
|||
{ |
|||
/* wait till the Status = PCCARD_STATUS_OK */ |
|||
status = *(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE); |
|||
timeout--; |
|||
} while ((status != PCCARD_STATUS_OK) && timeout); |
|||
|
|||
if (timeout == 0U) |
|||
{ |
|||
*pStatus = PCCARD_TIMEOUT_ERROR; |
|||
} |
|||
|
|||
/* Read bytes */ |
|||
for (; index < PCCARD_SECTOR_SIZE; index++) |
|||
{ |
|||
*(uint16_t *)pBuffer++ = *(uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR); |
|||
} |
|||
|
|||
/* Update the PCCARD controller state */ |
|||
hpccard->State = HAL_PCCARD_STATE_READY; |
|||
|
|||
/* Process unlocked */ |
|||
__HAL_UNLOCK(hpccard); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
|
|||
/**
|
|||
* @brief Write sector to PCCARD memory |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @param pBuffer pointer to source write buffer |
|||
* @param SectorAddress Sector address to write |
|||
* @param pStatus pointer to PCCARD status |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCCARD_Write_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *pBuffer, uint16_t SectorAddress, |
|||
uint8_t *pStatus) |
|||
{ |
|||
uint32_t timeout = 0U; |
|||
uint32_t index = 0U; |
|||
uint8_t status = 0U; |
|||
|
|||
/* Process Locked */ |
|||
__HAL_LOCK(hpccard); |
|||
|
|||
/* Check the PCCARD controller state */ |
|||
if (hpccard->State == HAL_PCCARD_STATE_BUSY) |
|||
{ |
|||
return HAL_BUSY; |
|||
} |
|||
|
|||
/* Initialize timeout value */ |
|||
timeout = PCCARD_TIMEOUT_READ_WRITE_SECTOR; |
|||
|
|||
/* Update the PCCARD controller state */ |
|||
hpccard->State = HAL_PCCARD_STATE_BUSY; |
|||
|
|||
/* Initialize PCCARD status */ |
|||
*pStatus = PCCARD_READY; |
|||
|
|||
/* Set the parameters to write a sector */ |
|||
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_CYLINDER_HIGH) = (uint16_t)0x0000; |
|||
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_SECTOR_COUNT) = ((uint16_t)0x0100) | ((uint16_t)SectorAddress); |
|||
*(__IO uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD) = (uint16_t)0x30A0; |
|||
|
|||
do |
|||
{ |
|||
/* Wait till the Status = PCCARD_STATUS_OK */ |
|||
status = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE); |
|||
timeout--; |
|||
} while ((status != PCCARD_STATUS_OK) && timeout); |
|||
|
|||
if (timeout == 0U) |
|||
{ |
|||
*pStatus = PCCARD_TIMEOUT_ERROR; |
|||
} |
|||
|
|||
/* Write bytes */ |
|||
for (; index < PCCARD_SECTOR_SIZE; index++) |
|||
{ |
|||
*(uint16_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR) = *(uint16_t *)pBuffer++; |
|||
} |
|||
|
|||
do |
|||
{ |
|||
/* Wait till the Status = PCCARD_STATUS_WRITE_OK */ |
|||
status = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE); |
|||
timeout--; |
|||
} while ((status != PCCARD_STATUS_WRITE_OK) && timeout); |
|||
|
|||
if (timeout == 0U) |
|||
{ |
|||
*pStatus = PCCARD_TIMEOUT_ERROR; |
|||
} |
|||
|
|||
/* Update the PCCARD controller state */ |
|||
hpccard->State = HAL_PCCARD_STATE_READY; |
|||
|
|||
/* Process unlocked */ |
|||
__HAL_UNLOCK(hpccard); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
|
|||
/**
|
|||
* @brief Erase sector from PCCARD memory |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @param SectorAddress Sector address to erase |
|||
* @param pStatus pointer to PCCARD status |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCCARD_Erase_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t SectorAddress, uint8_t *pStatus) |
|||
{ |
|||
uint32_t timeout = PCCARD_TIMEOUT_ERASE_SECTOR; |
|||
uint8_t status = 0U; |
|||
|
|||
/* Process Locked */ |
|||
__HAL_LOCK(hpccard); |
|||
|
|||
/* Check the PCCARD controller state */ |
|||
if (hpccard->State == HAL_PCCARD_STATE_BUSY) |
|||
{ |
|||
return HAL_BUSY; |
|||
} |
|||
|
|||
/* Update the PCCARD controller state */ |
|||
hpccard->State = HAL_PCCARD_STATE_BUSY; |
|||
|
|||
/* Initialize PCCARD status */ |
|||
*pStatus = PCCARD_READY; |
|||
|
|||
/* Set the parameters to write a sector */ |
|||
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_CYLINDER_LOW) = 0x00; |
|||
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_CYLINDER_HIGH) = 0x00; |
|||
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_SECTOR_NUMBER) = SectorAddress; |
|||
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_SECTOR_COUNT) = 0x01; |
|||
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_CARD_HEAD) = 0xA0; |
|||
*(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD) = ATA_ERASE_SECTOR_CMD; |
|||
|
|||
/* wait till the PCCARD is ready */ |
|||
status = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE); |
|||
|
|||
while ((status != PCCARD_STATUS_WRITE_OK) && timeout) |
|||
{ |
|||
status = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE); |
|||
timeout--; |
|||
} |
|||
|
|||
if (timeout == 0U) |
|||
{ |
|||
*pStatus = PCCARD_TIMEOUT_ERROR; |
|||
} |
|||
|
|||
/* Check the PCCARD controller state */ |
|||
hpccard->State = HAL_PCCARD_STATE_READY; |
|||
|
|||
/* Process unlocked */ |
|||
__HAL_UNLOCK(hpccard); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief Reset the PCCARD memory |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @retval HAL status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCCARD_Reset(PCCARD_HandleTypeDef *hpccard) |
|||
{ |
|||
/* Process Locked */ |
|||
__HAL_LOCK(hpccard); |
|||
|
|||
/* Check the PCCARD controller state */ |
|||
if (hpccard->State == HAL_PCCARD_STATE_BUSY) |
|||
{ |
|||
return HAL_BUSY; |
|||
} |
|||
|
|||
/* Provide a SW reset and Read and verify the:
|
|||
- PCCard Configuration Option Register at address 0x98000200 --> 0x80 |
|||
- Card Configuration and Status Register at address 0x98000202 --> 0x00 |
|||
- Pin Replacement Register at address 0x98000204 --> 0x0C |
|||
- Socket and Copy Register at address 0x98000206 --> 0x00 |
|||
*/ |
|||
|
|||
/* Check the PCCARD controller state */ |
|||
hpccard->State = HAL_PCCARD_STATE_BUSY; |
|||
|
|||
*(__IO uint8_t *)(PCCARD_ATTRIBUTE_SPACE_ADDRESS | ATA_CARD_CONFIGURATION) = 0x01; |
|||
|
|||
/* Check the PCCARD controller state */ |
|||
hpccard->State = HAL_PCCARD_STATE_READY; |
|||
|
|||
/* Process unlocked */ |
|||
__HAL_UNLOCK(hpccard); |
|||
|
|||
return HAL_OK; |
|||
} |
|||
|
|||
/**
|
|||
* @brief This function handles PCCARD device interrupt request. |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @retval HAL status |
|||
*/ |
|||
void HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard) |
|||
{ |
|||
/* Check PCCARD interrupt Rising edge flag */ |
|||
if (__FMC_PCCARD_GET_FLAG(hpccard->Instance, FMC_FLAG_RISING_EDGE)) |
|||
{ |
|||
/* PCCARD interrupt callback*/ |
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
hpccard->ItCallback(hpccard); |
|||
#else |
|||
HAL_PCCARD_ITCallback(hpccard); |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
|
|||
/* Clear PCCARD interrupt Rising edge pending bit */ |
|||
__FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_RISING_EDGE); |
|||
} |
|||
|
|||
/* Check PCCARD interrupt Level flag */ |
|||
if (__FMC_PCCARD_GET_FLAG(hpccard->Instance, FMC_FLAG_LEVEL)) |
|||
{ |
|||
/* PCCARD interrupt callback*/ |
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
hpccard->ItCallback(hpccard); |
|||
#else |
|||
HAL_PCCARD_ITCallback(hpccard); |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
|
|||
/* Clear PCCARD interrupt Level pending bit */ |
|||
__FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_LEVEL); |
|||
} |
|||
|
|||
/* Check PCCARD interrupt Falling edge flag */ |
|||
if (__FMC_PCCARD_GET_FLAG(hpccard->Instance, FMC_FLAG_FALLING_EDGE)) |
|||
{ |
|||
/* PCCARD interrupt callback*/ |
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
hpccard->ItCallback(hpccard); |
|||
#else |
|||
HAL_PCCARD_ITCallback(hpccard); |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
|
|||
/* Clear PCCARD interrupt Falling edge pending bit */ |
|||
__FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_FALLING_EDGE); |
|||
} |
|||
|
|||
/* Check PCCARD interrupt FIFO empty flag */ |
|||
if (__FMC_PCCARD_GET_FLAG(hpccard->Instance, FMC_FLAG_FEMPT)) |
|||
{ |
|||
/* PCCARD interrupt callback*/ |
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
hpccard->ItCallback(hpccard); |
|||
#else |
|||
HAL_PCCARD_ITCallback(hpccard); |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
|
|||
/* Clear PCCARD interrupt FIFO empty pending bit */ |
|||
__FMC_PCCARD_CLEAR_FLAG(hpccard->Instance, FMC_FLAG_FEMPT); |
|||
} |
|||
} |
|||
|
|||
/**
|
|||
* @brief PCCARD interrupt feature callback |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @retval None |
|||
*/ |
|||
__weak void HAL_PCCARD_ITCallback(PCCARD_HandleTypeDef *hpccard) |
|||
{ |
|||
/* Prevent unused argument(s) compilation warning */ |
|||
UNUSED(hpccard); |
|||
/* NOTE : This function Should not be modified, when the callback is needed,
|
|||
the HAL_PCCARD_ITCallback could be implemented in the user file |
|||
*/ |
|||
} |
|||
|
|||
#if (USE_HAL_PCCARD_REGISTER_CALLBACKS == 1) |
|||
/**
|
|||
* @brief Register a User PCCARD Callback |
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* To be used instead of the weak (surcharged) predefined callback |
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* @param hpccard : PCCARD handle |
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* @param CallbackId : ID of the callback to be registered |
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* This parameter can be one of the following values: |
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* @arg @ref HAL_PCCARD_MSP_INIT_CB_ID PCCARD MspInit callback ID |
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* @arg @ref HAL_PCCARD_MSP_DEINIT_CB_ID PCCARD MspDeInit callback ID |
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* @arg @ref HAL_PCCARD_IT_CB_ID PCCARD IT callback ID |
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* @param pCallback : pointer to the Callback function |
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* @retval status |
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*/ |
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HAL_StatusTypeDef HAL_PCCARD_RegisterCallback(PCCARD_HandleTypeDef *hpccard, HAL_PCCARD_CallbackIDTypeDef CallbackId, |
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pPCCARD_CallbackTypeDef pCallback) |
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{ |
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HAL_StatusTypeDef status = HAL_OK; |
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|
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if (pCallback == NULL) |
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{ |
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return HAL_ERROR; |
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} |
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|
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/* Process locked */ |
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__HAL_LOCK(hpccard); |
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|
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if (hpccard->State == HAL_PCCARD_STATE_READY) |
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{ |
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switch (CallbackId) |
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{ |
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case HAL_PCCARD_MSP_INIT_CB_ID : |
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hpccard->MspInitCallback = pCallback; |
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break; |
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case HAL_PCCARD_MSP_DEINIT_CB_ID : |
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hpccard->MspDeInitCallback = pCallback; |
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break; |
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case HAL_PCCARD_IT_CB_ID : |
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hpccard->ItCallback = pCallback; |
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break; |
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default : |
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/* update return status */ |
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status = HAL_ERROR; |
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break; |
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} |
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} |
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else if (hpccard->State == HAL_PCCARD_STATE_RESET) |
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{ |
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switch (CallbackId) |
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{ |
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case HAL_PCCARD_MSP_INIT_CB_ID : |
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hpccard->MspInitCallback = pCallback; |
|||
break; |
|||
case HAL_PCCARD_MSP_DEINIT_CB_ID : |
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hpccard->MspDeInitCallback = pCallback; |
|||
break; |
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default : |
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/* update return status */ |
|||
status = HAL_ERROR; |
|||
break; |
|||
} |
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} |
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else |
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{ |
|||
/* update return status */ |
|||
status = HAL_ERROR; |
|||
} |
|||
|
|||
/* Release Lock */ |
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__HAL_UNLOCK(hpccard); |
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return status; |
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} |
|||
|
|||
/**
|
|||
* @brief Unregister a User PCCARD Callback |
|||
* PCCARD Callback is redirected to the weak (surcharged) predefined callback |
|||
* @param hpccard : PCCARD handle |
|||
* @param CallbackId : ID of the callback to be unregistered |
|||
* This parameter can be one of the following values: |
|||
* @arg @ref HAL_PCCARD_MSP_INIT_CB_ID PCCARD MspInit callback ID |
|||
* @arg @ref HAL_PCCARD_MSP_DEINIT_CB_ID PCCARD MspDeInit callback ID |
|||
* @arg @ref HAL_PCCARD_IT_CB_ID PCCARD IT callback ID |
|||
* @retval status |
|||
*/ |
|||
HAL_StatusTypeDef HAL_PCCARD_UnRegisterCallback(PCCARD_HandleTypeDef *hpccard, HAL_PCCARD_CallbackIDTypeDef CallbackId) |
|||
{ |
|||
HAL_StatusTypeDef status = HAL_OK; |
|||
|
|||
/* Process locked */ |
|||
__HAL_LOCK(hpccard); |
|||
|
|||
if (hpccard->State == HAL_PCCARD_STATE_READY) |
|||
{ |
|||
switch (CallbackId) |
|||
{ |
|||
case HAL_PCCARD_MSP_INIT_CB_ID : |
|||
hpccard->MspInitCallback = HAL_PCCARD_MspInit; |
|||
break; |
|||
case HAL_PCCARD_MSP_DEINIT_CB_ID : |
|||
hpccard->MspDeInitCallback = HAL_PCCARD_MspDeInit; |
|||
break; |
|||
case HAL_PCCARD_IT_CB_ID : |
|||
hpccard->ItCallback = HAL_PCCARD_ITCallback; |
|||
break; |
|||
default : |
|||
/* update return status */ |
|||
status = HAL_ERROR; |
|||
break; |
|||
} |
|||
} |
|||
else if (hpccard->State == HAL_PCCARD_STATE_RESET) |
|||
{ |
|||
switch (CallbackId) |
|||
{ |
|||
case HAL_PCCARD_MSP_INIT_CB_ID : |
|||
hpccard->MspInitCallback = HAL_PCCARD_MspInit; |
|||
break; |
|||
case HAL_PCCARD_MSP_DEINIT_CB_ID : |
|||
hpccard->MspDeInitCallback = HAL_PCCARD_MspDeInit; |
|||
break; |
|||
default : |
|||
/* update return status */ |
|||
status = HAL_ERROR; |
|||
break; |
|||
} |
|||
} |
|||
else |
|||
{ |
|||
/* update return status */ |
|||
status = HAL_ERROR; |
|||
} |
|||
|
|||
/* Release Lock */ |
|||
__HAL_UNLOCK(hpccard); |
|||
return status; |
|||
} |
|||
#endif /* USE_HAL_PCCARD_REGISTER_CALLBACKS */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/** @defgroup PCCARD_Exported_Functions_Group3 State functions
|
|||
* @brief Peripheral State functions |
|||
* |
|||
@verbatim |
|||
============================================================================== |
|||
##### PCCARD State functions ##### |
|||
============================================================================== |
|||
[..] |
|||
This subsection permits to get in run-time the status of the PCCARD controller |
|||
and the data flow. |
|||
|
|||
@endverbatim |
|||
* @{ |
|||
*/ |
|||
|
|||
/**
|
|||
* @brief return the PCCARD controller state |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @retval HAL state |
|||
*/ |
|||
HAL_PCCARD_StateTypeDef HAL_PCCARD_GetState(PCCARD_HandleTypeDef *hpccard) |
|||
{ |
|||
return hpccard->State; |
|||
} |
|||
|
|||
/**
|
|||
* @brief Get the compact flash memory status |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @retval New status of the PCCARD operation. This parameter can be: |
|||
* - CompactFlash_TIMEOUT_ERROR: when the previous operation generate |
|||
* a Timeout error |
|||
* - CompactFlash_READY: when memory is ready for the next operation |
|||
*/ |
|||
HAL_PCCARD_StatusTypeDef HAL_PCCARD_GetStatus(PCCARD_HandleTypeDef *hpccard) |
|||
{ |
|||
uint32_t timeout = PCCARD_TIMEOUT_STATUS; |
|||
uint32_t status_pccard = 0U; |
|||
|
|||
/* Check the PCCARD controller state */ |
|||
if (hpccard->State == HAL_PCCARD_STATE_BUSY) |
|||
{ |
|||
return HAL_PCCARD_STATUS_ONGOING; |
|||
} |
|||
|
|||
status_pccard = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE); |
|||
|
|||
while ((status_pccard == PCCARD_BUSY) && timeout) |
|||
{ |
|||
status_pccard = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE); |
|||
timeout--; |
|||
} |
|||
|
|||
if (timeout == 0U) |
|||
{ |
|||
status_pccard = PCCARD_TIMEOUT_ERROR; |
|||
} |
|||
|
|||
/* Return the operation status */ |
|||
return (HAL_PCCARD_StatusTypeDef) status_pccard; |
|||
} |
|||
|
|||
/**
|
|||
* @brief Reads the Compact Flash memory status using the Read status command |
|||
* @param hpccard pointer to a PCCARD_HandleTypeDef structure that contains |
|||
* the configuration information for PCCARD module. |
|||
* @retval The status of the Compact Flash memory. This parameter can be: |
|||
* - CompactFlash_BUSY: when memory is busy |
|||
* - CompactFlash_READY: when memory is ready for the next operation |
|||
* - CompactFlash_ERROR: when the previous operation generates error |
|||
*/ |
|||
HAL_PCCARD_StatusTypeDef HAL_PCCARD_ReadStatus(PCCARD_HandleTypeDef *hpccard) |
|||
{ |
|||
uint8_t data = 0U; |
|||
uint8_t status_pccard = PCCARD_BUSY; |
|||
|
|||
/* Check the PCCARD controller state */ |
|||
if (hpccard->State == HAL_PCCARD_STATE_BUSY) |
|||
{ |
|||
return HAL_PCCARD_STATUS_ONGOING; |
|||
} |
|||
|
|||
/* Read status operation */ |
|||
data = *(__IO uint8_t *)(PCCARD_IO_SPACE_PRIMARY_ADDR | ATA_STATUS_CMD_ALTERNATE); |
|||
|
|||
if ((data & PCCARD_TIMEOUT_ERROR) == PCCARD_TIMEOUT_ERROR) |
|||
{ |
|||
status_pccard = PCCARD_TIMEOUT_ERROR; |
|||
} |
|||
else if ((data & PCCARD_READY) == PCCARD_READY) |
|||
{ |
|||
status_pccard = PCCARD_READY; |
|||
} |
|||
|
|||
return (HAL_PCCARD_StatusTypeDef) status_pccard; |
|||
} |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
#endif /* HAL_PCCARD_MODULE_ENABLED */ |
|||
|
|||
/**
|
|||
* @} |
|||
*/ |
|||
|
|||
#endif /* FMC_Bank4 || FSMC_Bank4 */ |
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@ -0,0 +1 @@ |
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[{"config_name":"Debug","exclude_files":["applications/LVGL"]}] |
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@ -0,0 +1 @@ |
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Subproject commit 0000000000000000000000000000000000000000 |
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Reference in new issue