sdio+fatfs创建
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@@ -0,0 +1,14 @@
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# RT-Thread building script for component
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from building import *
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Import('rtconfig')
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cwd = GetCurrentDir()
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src = Glob('*.c') + Glob('*.cpp') + Glob('*.s')
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CPPPATH = [cwd]
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ASFLAGS = ''
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group = DefineGroup('CPU', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
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Return('group')
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@@ -0,0 +1,329 @@
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;
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; Copyright (c) 2006-2022, RT-Thread Development Team
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;
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; SPDX-License-Identifier: Apache-2.0
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;
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; Change Logs:
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; Date Author Notes
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; 2018-09-01 xuzhuoyi the first version.
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; 2019-06-17 zhaoxiaowei fix bugs of old c28x interrupt api.
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; 2019-07-03 zhaoxiaowei add _rt_hw_calc_csb function to support __rt_ffs.
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; 2019-12-05 xiaolifan add support for hardware fpu32
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;
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.ref _rt_interrupt_to_thread
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.ref _rt_interrupt_from_thread
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.ref _rt_thread_switch_interrupt_flag
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.def _RTOSINT_Handler
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.def _rt_hw_get_st0
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.def _rt_hw_get_st1
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.def _rt_hw_calc_csb
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.def _rt_hw_context_switch_interrupt
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.def _rt_hw_context_switch
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.def _rt_hw_context_switch_to
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.def _rt_hw_interrupt_thread_switch
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.def _rt_hw_interrupt_disable
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.def _rt_hw_interrupt_enable
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;workaround for importing fpu settings from the compiler
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.cdecls C,NOLIST
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%{
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#ifdef __TMS320C28XX_FPU32__
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#define __FPU32__ 1
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#else
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#define __FPU32__ 0
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#endif
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%}
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RT_CTX_SAVE .macro
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PUSH AR1H:AR0H
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PUSH XAR2
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PUSH XAR3
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PUSH XAR4
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PUSH XAR5
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PUSH XAR6
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PUSH XAR7
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PUSH XT
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PUSH RPC
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.if __FPU32__
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PUSH RB
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MOV32 *SP++, STF
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MOV32 *SP++, R0H
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MOV32 *SP++, R1H
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MOV32 *SP++, R2H
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MOV32 *SP++, R3H
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MOV32 *SP++, R4H
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MOV32 *SP++, R5H
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MOV32 *SP++, R6H
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MOV32 *SP++, R7H
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.endif
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.endm
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RT_CTX_RESTORE .macro
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.if __FPU32__
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MOV32 R7H, *--SP, UNCF
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MOV32 R6H, *--SP, UNCF
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MOV32 R5H, *--SP, UNCF
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MOV32 R4H, *--SP, UNCF
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MOV32 R3H, *--SP, UNCF
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MOV32 R2H, *--SP, UNCF
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MOV32 R1H, *--SP, UNCF
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MOV32 R0H, *--SP, UNCF
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MOV32 STF, *--SP
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POP RB
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.endif
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POP RPC
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POP XT
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POP XAR7
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POP XAR6
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POP XAR5
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POP XAR4
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POP XAR3
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POP XAR2
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MOVZ AR0 , @SP
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SUBB XAR0, #6
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MOVL ACC , *XAR0
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AND ACC, #0xFFFF << 16
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MOV AL, IER
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MOVL *XAR0, ACC
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POP AR1H:AR0H
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.endm
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.text
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.newblock
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;
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; rt_base_t rt_hw_interrupt_disable();
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;
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.asmfunc
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_rt_hw_interrupt_disable:
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PUSH ST1
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SETC INTM,DBGM
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MOV AL, *--SP
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LRETR
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.endasmfunc
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;
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; void rt_hw_interrupt_enable(rt_base_t level);
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;
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.asmfunc
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_rt_hw_interrupt_enable:
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MOV *SP++, AL
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POP ST1
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LRETR
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.endasmfunc
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;
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; void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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; r0 --> from
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; r4 --> to
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.asmfunc
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_rt_hw_context_switch_interrupt:
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MOVL XAR0, #0
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MOV AR0, AL
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MOVL XAR4, *-SP[4]
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; set rt_thread_switch_interrupt_flag to 1
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MOVL XAR5, #_rt_thread_switch_interrupt_flag
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MOVL XAR6, *XAR5
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MOVL ACC, XAR6
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CMPB AL, #1
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B _reswitch, EQ
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MOVL XAR6, #1
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MOVL *XAR5, XAR6
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MOVL XAR5, #_rt_interrupt_from_thread ; set rt_interrupt_from_thread
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MOVL *XAR5, XAR0
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_reswitch:
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MOVL XAR5, #_rt_interrupt_to_thread ; set rt_interrupt_to_thread
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MOVL *XAR5, XAR4
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LRETR
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.endasmfunc
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;
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; void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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; r0 --> from
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; r4 --> to
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.asmfunc
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_rt_hw_context_switch:
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MOVL XAR0, #0
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MOV AR0, AL
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MOVL XAR4, *-SP[4]
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; set rt_thread_switch_interrupt_flag to 1
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MOVL XAR5, #_rt_thread_switch_interrupt_flag
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MOVL XAR6, *XAR5
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MOVL ACC, XAR6
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CMPB AL, #1
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B _reswitch2, EQ
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MOVL XAR6, #1
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MOVL *XAR5, XAR6
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MOVL XAR5, #_rt_interrupt_from_thread ; set rt_interrupt_from_thread
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MOVL *XAR5, XAR0
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_reswitch2:
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MOVL XAR5, #_rt_interrupt_to_thread ; set rt_interrupt_to_thread
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MOVL *XAR5, XAR4
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TRAP #16
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LRETR
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.endasmfunc
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.asmfunc
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_RTOSINT_Handler:
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; disable interrupt to protect context switch
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DINT
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; get rt_thread_switch_interrupt_flag
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MOV AR0, #_rt_thread_switch_interrupt_flag
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MOV AL, *AR0
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MOV AR1, AL
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CMP AR1, #0
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B rtosint_exit, EQ ; pendsv already handled
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; clear rt_thread_switch_interrupt_flag to 0
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MOV AR1, #0x00
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MOV *AR0, AR1
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MOV AR0, #_rt_interrupt_from_thread
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MOV AL, *AR0
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MOV AR1, AL
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CMP AR1, #0
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B switch_to_thread, EQ ; skip register save at the first time
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;#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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; TST lr, #0x10 ; if(!EXC_RETURN[4])
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; VSTMDBEQ r1!, {d8 - d15} ; push FPU register s16~s31
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;#endif
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RT_CTX_SAVE ; push r4 - r11 register
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;#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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; MOV r4, #0x00 ; flag = 0
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; TST lr, #0x10 ; if(!EXC_RETURN[4])
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; MOVEQ r4, #0x01 ; flag = 1
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; STMFD r1!, {r4} ; push flag
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;#endif
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MOV AL, *AR0
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MOV AR0, AL
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MOVZ AR1, @SP ; get from thread stack pointer
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MOV *AR0, AR1 ; update from thread stack pointer
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switch_to_thread:
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MOV AR1, #_rt_interrupt_to_thread
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MOV AL, *AR1
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MOV AR1, AL
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MOV AL, *AR1
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MOV AR1, AL ; load thread stack pointer
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;#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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; LDMFD r1!, {r3} ; pop flag
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;#endif
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MOV @SP, AR1
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RT_CTX_RESTORE ; pop r4 - r11 register
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rtosint_exit:
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; restore interrupt
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EINT
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IRET
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.endasmfunc
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.asmfunc
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_rt_hw_get_st0:
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PUSH ST0
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POP AL
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LRETR
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.endasmfunc
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.asmfunc
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_rt_hw_get_st1:
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PUSH ST1
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POP AL
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LRETR
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.endasmfunc
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; C28x do not have a build-in "__ffs" func in its C compiler.
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; We can use the "Count Sign Bits" (CSB) instruction to make one.
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; CSB will return the number of 0's minus 1 above the highest set bit.
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; The count is placed in T. For example:
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; ACC T maxbit
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; 0x00000001 30 0
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; 0x00000010 26 4
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; 0x000001FF 22 8
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; 0x000001F0 22 8
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.asmfunc
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_rt_hw_calc_csb:
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MOV AH, #0
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CSB ACC ; T = no. of sign bits - 1
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MOVU ACC, T ; ACC = no. of sign bits - 1
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SUBB ACC, #30 ; ACC = ACC - 30
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ABS ACC ; ACC = |ACC|
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lretr
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.endasmfunc
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;
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; * void rt_hw_context_switch_to(rt_uint32 to);
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; * r0 --> to
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.asmfunc
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_rt_hw_context_switch_to:
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MOV AR1, #_rt_interrupt_to_thread
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MOV *AR1, AL
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;#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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; CLEAR CONTROL.FPCA
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; MRS r2, CONTROL ; read
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; BIC r2, #0x04 ; modify
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; MSR CONTROL, r2 ; write-back
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;#endif
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; set from thread to 0
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MOV AR1, #_rt_interrupt_from_thread
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MOV AR0, #0x0
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MOV *AR1, AR0
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; set interrupt flag to 1
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MOV AR1, #_rt_thread_switch_interrupt_flag
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MOV AR0, #1
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MOV *AR1, AR0
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TRAP #16
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; never reach here!
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.endasmfunc
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; compatible with old version
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.asmfunc
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_rt_hw_interrupt_thread_switch:
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LRETR
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NOP
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.endasmfunc
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.end
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@@ -0,0 +1,148 @@
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-09-01 xuzhuoyi the first version.
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* 2019-07-03 zhaoxiaowei add support for __rt_ffs.
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* 2019-12-05 xiaolifan add support for hardware fpu32
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*/
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#include <rtthread.h>
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/* exception and interrupt handler table */
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rt_uint32_t rt_interrupt_from_thread;
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rt_uint32_t rt_interrupt_to_thread;
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rt_uint32_t rt_thread_switch_interrupt_flag;
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/* exception hook */
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static rt_err_t (*rt_exception_hook)(void *context) = RT_NULL;
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extern rt_uint16_t rt_hw_get_st0(void);
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extern rt_uint16_t rt_hw_get_st1(void);
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extern int rt_hw_calc_csb(int value);
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struct exception_stack_frame
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{
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rt_uint32_t t_st0;
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rt_uint32_t acc;
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rt_uint32_t p;
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rt_uint32_t ar1_ar0;
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rt_uint32_t dp_st1;
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rt_uint32_t dbgstat_ier;
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rt_uint32_t return_address;
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};
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struct stack_frame
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{
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struct exception_stack_frame exception_stack_frame;
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/* r4 ~ r11 register */
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rt_uint16_t ar0h;
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rt_uint16_t ar1h;
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rt_uint32_t xar2;
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rt_uint32_t xar3;
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rt_uint32_t xar4;
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rt_uint32_t xar5;
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rt_uint32_t xar6;
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rt_uint32_t xar7;
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rt_uint32_t xt;
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rt_uint32_t rpc;
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#ifdef __TMS320C28XX_FPU32__
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rt_uint32_t rb;
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rt_uint32_t stf;
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rt_uint32_t r0h;
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rt_uint32_t r1h;
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rt_uint32_t r2h;
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rt_uint32_t r3h;
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rt_uint32_t r4h;
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rt_uint32_t r5h;
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rt_uint32_t r6h;
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rt_uint32_t r7h;
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#endif
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};
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rt_uint8_t *rt_hw_stack_init(void *tentry,
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void *parameter,
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rt_uint8_t *stack_addr,
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void *texit)
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{
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struct stack_frame *stack_frame;
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rt_uint8_t *stk;
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unsigned long i;
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stk = stack_addr;
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stk = (rt_uint8_t *)RT_ALIGN((rt_uint32_t)stk, 8);
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//stk -= sizeof(struct stack_frame);
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stk += 1;
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stack_frame = (struct stack_frame *)stk;
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/* init all register */
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for (i = 0; i < sizeof(struct stack_frame) / sizeof(rt_uint32_t); i ++)
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{
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((rt_uint32_t *)stack_frame)[i] = 0xdeadbeef;
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}
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stack_frame->exception_stack_frame.t_st0 = 0x11110000 | rt_hw_get_st0();
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stack_frame->exception_stack_frame.acc = 0x33332222;
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stack_frame->exception_stack_frame.ar1_ar0 = 0x00001111 & (unsigned long)parameter; /* ar0 : argument */
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stack_frame->exception_stack_frame.p = 0x55554444; /* p */
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stack_frame->exception_stack_frame.dp_st1 = (0x00000000) | rt_hw_get_st1() & 0xFFFFFFFE; /* dp_st1 */
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stack_frame->exception_stack_frame.dbgstat_ier = 0; /* dbgstat_ier */
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stack_frame->exception_stack_frame.return_address = (unsigned long)tentry; /* return_address */
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stack_frame->rpc = (unsigned long)texit;
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#ifdef __TMS320C28XX_FPU32__
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stack_frame->stf = 0x00000200;
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stack_frame->rb = 0;
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#endif
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/* return task's current stack address */
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return stk + sizeof(struct stack_frame);
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}
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/**
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* This function set the hook, which is invoked on fault exception handling.
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*
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* @param exception_handle the exception handling hook function.
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*/
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void rt_hw_exception_install(rt_err_t (*exception_handle)(void *context))
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{
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rt_exception_hook = exception_handle;
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}
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struct exception_info
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{
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rt_uint32_t exc_return;
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struct stack_frame stack_frame;
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};
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#ifdef RT_USING_CPU_FFS
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/*
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* This function called rt_hw_calc_csb to finds the first bit set in value.
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* rt_hw_calc_csb is a native assembly program that use "CSB" instruction in C28x.
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* When you use this function, remember that "int" is only 16-bit in C28x's C compiler.
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* If value is a number bigger that 0xFFFF, trouble may be caused.
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* Maybe change "int __rt_ffs(int value)" to "rt_int32_t __rt_ffs(rt_int32_t value)" will be better.
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*/
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int __rt_ffs(int value)
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{
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return rt_hw_calc_csb(value);
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}
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#endif
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/**
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* shutdown CPU
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*/
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RT_WEAK void rt_hw_cpu_shutdown(void)
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{
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rt_kprintf("shutdown...\n");
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RT_ASSERT(0);
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}
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