软件包修改

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sc committed 2025-12-07 14:37:00 +08:00
1 parent 425aec3576
commit 2fd0bf135d
27 files changed
+1367 -1090

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-1
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@@ -25,7 +25,6 @@ int read_write_sample(void)
// 初始化INI解析器
INI_File *ini = ini_init();
if (!ini) {
rt_kprintf("1\n");
return -1;
}
// 解析INI文件
@@ -40,7 +40,6 @@ static void mb_plc_read_regs(mb_inst_t *hinst)
int total = mb_read_input_regs(hinst, addr, nb, regs);
if (total <= 0)
{
LOG_E("modbus read register fail.");
return;
}
u8 regsM[64];
@@ -49,7 +48,6 @@ static void mb_plc_read_regs(mb_inst_t *hinst)
int totalM = mb_read_bits(hinst, addrM, nbM, regsM);
if (totalM <= 0)
{
LOG_E("modbus read register fail.");
return;
}
}
@@ -21,7 +21,7 @@
static struct rt_semaphore rx_sem;
#define RX_LINE_BUF_SIZE 1024
#define RS485_SAMPLE_SLAVE_SERIAL "uart1"
#define RS485_SAMPLE_SLAVE_SERIAL "uart4"
#define RS485_SAMPLE_SLAVE_BAUDRATE 57600
#define RS485_SAMPLE_MASTER_PARITY 0 //0 -- none parity
#define RS485_SAMPLE_SLAVE_PIN -1 //-1 -- nonuse rs485 mode control
+48 -3
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@@ -7,11 +7,56 @@
* Date Author Notes
* 2025-11-25 Administrator the first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
#include "lvgl.h"
#define DBG_TAG "gui"
#define DBG_LVL DBG_LOG
#include <rtdbg.h>
#define LCD_BL_PIN GET_PIN(D,12)
#define LCD_RST_PIN GET_PIN(D,11)
void lv_user_gui_init(void)
{
lv_obj_t *label = lv_label_create(lv_scr_act());
lv_label_set_text(label, "Hello LVGL on RT-Thread!");
lv_obj_align(label, LV_ALIGN_CENTER, 0, 0);
// rt_pin_mode(LCD_BL_PIN, PIN_MODE_OUTPUT);
// rt_pin_write( LCD_BL_PIN, PIN_HIGH);
// rt_pin_mIN, ode(LCD_RST_PIN, PIN_MODE_OUTPUT);
// rt_pin_write( LCD_RST_PPIN_LOW);
// 检查 LTDC 是否全局使能
if (LTDC->GCR & LTDC_GCR_LTDCEN)
{
LOG_D("LTDC is ENABLED");
}
else
{
LOG_E("LTDC is NOT enabled!");
}
// 检查图层 0 是否使能
if (LTDC_Layer1->CR & LTDC_LxCR_LEN)
{
LOG_D("Layer 0 is ENABLED");
}
else
{
LOG_E("Layer 0 is NOT enabled!");
}
if (__HAL_RCC_LTDC_IS_CLK_ENABLED())
{
LOG_D("LTDC clock is enabled");
}
else
{
LOG_E("LTDC clock is DISABLED! <-- This is likely the root cause");
}
// lv_obj_t *label = lv_label_create(lv_scr_act());
// lv_label_set_text(label, "Hello LVGL on RT-Thread!");
// lv_obj_align(label, LV_ALIGN_CENTER, 0, 0);
}
//INIT_APP_EXPORT(lv_user_gui_init);
+2 -2
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@@ -17,12 +17,12 @@
*********************/
#ifndef MY_DISP_HOR_RES
#warning Please define or replace the macro MY_DISP_HOR_RES with the actual screen width, default value 320 is used for now.
#define MY_DISP_HOR_RES 800
#define MY_DISP_HOR_RES 1024
#endif
#ifndef MY_DISP_VER_RES
#warning Please define or replace the macro MY_DISP_HOR_RES with the actual screen height, default value 240 is used for now.
#define MY_DISP_VER_RES 480
#define MY_DISP_VER_RES 600
#endif
/**********************
+6 -1
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@@ -12,7 +12,8 @@
#include <dfs_posix.h>
#include <light/RUN_LED.h>
#include "DB_SQLite.h"
#include "lv__user_gui.h"
#include "lcd.h"
#define DBG_TAG "main"
#define DBG_LVL DBG_LOG
#include <rtdbg.h>
@@ -24,5 +25,9 @@ int main(void)
rt_sem_take(mount_sem, rt_tick_from_millisecond(5000)); // 等待挂载完成,最多等待 5 秒
thread_DB_SQLite();
thread_RUN_LED();//运行指示灯线程
lcd_init();
// lv_user_gui_init();
return RT_EOK;
}
+2 -1
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@@ -83,6 +83,7 @@ static void SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM
/* Set the device refresh counter */
HAL_SDRAM_ProgramRefreshRate(hsdram, SDRAM_REFRESH_COUNT);
}
static int SDRAM_Init(void)
{
int result = RT_EOK;
@@ -235,7 +236,7 @@ MSH_CMD_EXPORT(sdram_test, sdram test)
/* 从片内 RAM 和 片外 SDRAM 顺序申请测试 */
void malloc_test(void)
{
int size = 50 * 1024; // 50KBytes
int size = 1024 * 1024; // 50KBytes
rt_uint8_t * ptr = RT_NULL;
ptr = rt_malloc(size);
if(ptr != RT_NULL)
+8 -4
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@@ -30,18 +30,22 @@
#define SDCLOCK_PERIOD 2
/* refresh rate counter */
//#define SDRAM_REFRESH_COUNT ((uint32_t)0x02AB)
#define SDRAM_REFRESH_COUNT ((uint32_t)0x1000)
//#define SDRAM_REFRESH_COUNT ((uint32_t)0x1000)
#define SDRAM_REFRESH_COUNT ((uint32_t)0x0396)
#define SDRAM_SIZE ((uint32_t)0x2000000)
/* Timing configuration for W9825G6KH-6 */
/* 90 MHz of SD clock frequency (180MHz/2) */
/* TMRD: 2 Clock cycles */
#define LOADTOACTIVEDELAY 2
/* TXSR: 7x11.90ns */
#define EXITSELFREFRESHDELAY 12
//#define EXITSELFREFRESHDELAY 12
#define EXITSELFREFRESHDELAY 7
/* TRAS: 4x11.90ns */
#define SELFREFRESHTIME 12
//#define SELFREFRESHTIME 12
#define SELFREFRESHTIME 5
/* TRC: 7x11.90ns */
#define ROWCYCLEDELAY 10
//#define ROWCYCLEDELAY 10
#define ROWCYCLEDELAY 7
/* TWR: 2 Clock cycles */
#define WRITERECOVERYTIME 2
/* TRP: 2x11.90ns */
+1 -1
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@@ -69,4 +69,4 @@ static int wdt_sample()
return ret;
}
INIT_APP_EXPORT(wdt_sample);
//INIT_APP_EXPORT(wdt_sample);