看门狗与stm32hal库
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-11-27 Administrator the first version
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*/
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/*
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* 程序清单：这是一个独立看门狗设备使用例程
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* 例程导出了 wdt_sample 命令到控制终端
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* 命令调用格式：wdt_sample wdt
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* 命令解释：命令第二个参数是要使用的看门狗设备名称，为空则使用例程默认的看门狗设备。
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* 程序功能：程序通过设备名称查找看门狗设备，然后初始化设备并设置看门狗设备溢出时间。
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* 然后设置空闲线程回调函数，在回调函数里会喂狗。
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#define WDT_DEVICE_NAME "wdt" /* 看门狗设备名称 */
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static rt_device_t wdg_dev; /* 看门狗设备句柄 */
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#define DBG_TAG "WDT"
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#define DBG_LVL DBG_LOG
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#include <rtdbg.h>
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static void idle_hook(void)
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{
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/* 在空闲线程的回调函数里喂狗 */
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rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_KEEPALIVE, NULL);
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}
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static int wdt_sample()
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{
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rt_err_t ret = RT_EOK;
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rt_uint32_t timeout = 1; /* 溢出时间，单位：秒 */
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char device_name[RT_NAME_MAX];
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rt_strncpy(device_name, WDT_DEVICE_NAME, RT_NAME_MAX);
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/* 根据设备名称查找看门狗设备，获取设备句柄 */
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wdg_dev = rt_device_find(device_name);
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if (!wdg_dev)
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{
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LOG_E("find %s failed!", device_name);
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return RT_ERROR;
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}
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/* 初始化设备 */
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rt_device_init(wdg_dev);
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/* 设置看门狗溢出时间 */
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ret = rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_SET_TIMEOUT, &timeout);
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if (ret != RT_EOK)
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{
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LOG_E("set %s timeout failed!", device_name);
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return RT_ERROR;
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}
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/* 启动看门狗 */
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ret = rt_device_control(wdg_dev, RT_DEVICE_CTRL_WDT_START, RT_NULL);
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if (ret != RT_EOK)
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{
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LOG_E("start %s failed!", device_name);
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return -RT_ERROR;
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}
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/* 设置空闲线程回调函数 */
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rt_thread_idle_sethook(idle_hook);
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LOG_I("start %s success!!", device_name);
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return ret;
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}
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INIT_APP_EXPORT(wdt_sample);
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/**
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******************************************************************************
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* @file stm32h7xx_hal_iwdg.h
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* @author MCD Application Team
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* @brief Header file of IWDG HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H7xx_HAL_IWDG_H
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#define STM32H7xx_HAL_IWDG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx_hal_def.h"
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/** @addtogroup STM32H7xx_HAL_Driver
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* @{
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*/
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/** @defgroup IWDG IWDG
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Types IWDG Exported Types
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* @{
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*/
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/**
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* @brief IWDG Init structure definition
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*/
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typedef struct
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{
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uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
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This parameter can be a value of @ref IWDG_Prescaler */
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uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
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This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
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uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
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This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
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} IWDG_InitTypeDef;
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/**
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* @brief IWDG Handle Structure definition
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*/
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typedef struct
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{
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IWDG_TypeDef *Instance; /*!< Register base address */
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IWDG_InitTypeDef Init; /*!< IWDG required parameters */
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} IWDG_HandleTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
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* @{
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*/
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/** @defgroup IWDG_Prescaler IWDG Prescaler
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* @{
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*/
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#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
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#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
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#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
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#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
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#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
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#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
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#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
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/**
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* @}
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*/
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/** @defgroup IWDG_Window_option IWDG Window option
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* @{
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*/
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#define IWDG_WINDOW_DISABLE IWDG_WINR_WIN
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macros -----------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
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* @{
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*/
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/**
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* @brief Enable the IWDG peripheral.
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
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/**
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* @brief Reload IWDG counter with value defined in the reload register
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* (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled).
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup IWDG_Exported_Functions IWDG Exported Functions
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* @{
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*/
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/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
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* @{
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*/
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/* Initialization/Start functions ********************************************/
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HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
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/**
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* @}
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*/
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/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
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* @{
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*/
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/* I/O operation functions ****************************************************/
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HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup IWDG_Private_Constants IWDG Private Constants
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* @{
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*/
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/**
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* @brief IWDG Key Register BitMask
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*/
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#define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */
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#define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */
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#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */
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#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup IWDG_Private_Macros IWDG Private Macros
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* @{
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*/
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/**
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* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
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/**
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* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
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* @param __HANDLE__ IWDG handle
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* @retval None
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*/
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#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
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/**
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* @brief Check IWDG prescaler value.
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* @param __PRESCALER__ IWDG prescaler value
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* @retval None
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*/
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#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
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((__PRESCALER__) == IWDG_PRESCALER_8) || \
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((__PRESCALER__) == IWDG_PRESCALER_16) || \
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((__PRESCALER__) == IWDG_PRESCALER_32) || \
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((__PRESCALER__) == IWDG_PRESCALER_64) || \
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((__PRESCALER__) == IWDG_PRESCALER_128)|| \
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((__PRESCALER__) == IWDG_PRESCALER_256))
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/**
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* @brief Check IWDG reload value.
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* @param __RELOAD__ IWDG reload value
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* @retval None
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*/
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#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
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/**
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* @brief Check IWDG window value.
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* @param __WINDOW__ IWDG window value
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* @retval None
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*/
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#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32H7xx_HAL_IWDG_H */
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Load diff
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@@ -0,0 +1,338 @@
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/**
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******************************************************************************
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* @file stm32h7xx_ll_iwdg.h
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* @author MCD Application Team
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* @brief Header file of IWDG LL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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|
* in the root directory of this software component.
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|
* If no LICENSE file comes with this software, it is provided AS-IS.
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|
*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H7xx_LL_IWDG_H
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#define STM32H7xx_LL_IWDG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx.h"
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/** @addtogroup STM32H7xx_LL_Driver
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* @{
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*/
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#if defined(IWDG1) || defined(IWDG2)
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/** @defgroup IWDG_LL IWDG
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
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* @{
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*/
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#define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
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#define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
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#define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
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#define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
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* @{
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*/
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/** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
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* @brief Flags defines which can be used with LL_IWDG_ReadReg function
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* @{
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*/
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#define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
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#define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
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#define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */
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/**
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* @}
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||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */
|
||||||
|
#define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */
|
||||||
|
#define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */
|
||||||
|
#define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */
|
||||||
|
#define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */
|
||||||
|
#define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */
|
||||||
|
#define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Write a value in IWDG register
|
||||||
|
* @param __INSTANCE__ IWDG Instance
|
||||||
|
* @param __REG__ Register to be written
|
||||||
|
* @param __VALUE__ Value to be written in the register
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Read a value in IWDG register
|
||||||
|
* @param __INSTANCE__ IWDG Instance
|
||||||
|
* @param __REG__ Register to be read
|
||||||
|
* @retval Register value
|
||||||
|
*/
|
||||||
|
#define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/** @defgroup IWDG_LL_EF_Configuration Configuration
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Start the Independent Watchdog
|
||||||
|
* @note Except if the hardware watchdog option is selected
|
||||||
|
* @rmtoll KR KEY LL_IWDG_Enable
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reloads IWDG counter with value defined in the reload register
|
||||||
|
* @rmtoll KR KEY LL_IWDG_ReloadCounter
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
|
||||||
|
* @rmtoll KR KEY LL_IWDG_EnableWriteAccess
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
|
||||||
|
* @rmtoll KR KEY LL_IWDG_DisableWriteAccess
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Select the prescaler of the IWDG
|
||||||
|
* @rmtoll PR PR LL_IWDG_SetPrescaler
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @param Prescaler This parameter can be one of the following values:
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_4
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_8
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_16
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_32
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_64
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_128
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_256
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Get the selected prescaler of the IWDG
|
||||||
|
* @rmtoll PR PR LL_IWDG_GetPrescaler
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval Returned value can be one of the following values:
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_4
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_8
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_16
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_32
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_64
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_128
|
||||||
|
* @arg @ref LL_IWDG_PRESCALER_256
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return (READ_REG(IWDGx->PR));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Specify the IWDG down-counter reload value
|
||||||
|
* @rmtoll RLR RL LL_IWDG_SetReloadCounter
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @param Counter Value between Min_Data=0 and Max_Data=0x0FFF
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Get the specified IWDG down-counter reload value
|
||||||
|
* @rmtoll RLR RL LL_IWDG_GetReloadCounter
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return (READ_REG(IWDGx->RLR));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Specify high limit of the window value to be compared to the down-counter.
|
||||||
|
* @rmtoll WINR WIN LL_IWDG_SetWindow
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @param Window Value between Min_Data=0 and Max_Data=0x0FFF
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
|
||||||
|
{
|
||||||
|
WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Get the high limit of the window value specified.
|
||||||
|
* @rmtoll WINR WIN LL_IWDG_GetWindow
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_GetWindow(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return (READ_REG(IWDGx->WINR));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check if flag Prescaler Value Update is set or not
|
||||||
|
* @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval State of bit (1 or 0).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check if flag Reload Value Update is set or not
|
||||||
|
* @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval State of bit (1 or 0).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check if flag Window Value Update is set or not
|
||||||
|
* @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval State of bit (1 or 0).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not
|
||||||
|
* @rmtoll SR PVU LL_IWDG_IsReady\n
|
||||||
|
* SR RVU LL_IWDG_IsReady\n
|
||||||
|
* SR WVU LL_IWDG_IsReady
|
||||||
|
* @param IWDGx IWDG Instance
|
||||||
|
* @retval State of bits (1 or 0).
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx)
|
||||||
|
{
|
||||||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* IWDG1 || IWDG2 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STM32H7xx_LL_IWDG_H */
|
||||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,284 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32h7xx_hal_iwdg.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief IWDG HAL module driver.
|
||||||
|
* This file provides firmware functions to manage the following
|
||||||
|
* functionalities of the Independent Watchdog (IWDG) peripheral:
|
||||||
|
* + Initialization and Start functions
|
||||||
|
* + IO operation functions
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
@verbatim
|
||||||
|
==============================================================================
|
||||||
|
##### IWDG Generic features #####
|
||||||
|
==============================================================================
|
||||||
|
[..]
|
||||||
|
(+) The IWDG can be started by either software or hardware (configurable
|
||||||
|
through option byte).
|
||||||
|
|
||||||
|
(+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
|
||||||
|
active even if the main clock fails.
|
||||||
|
|
||||||
|
(+) Once the IWDG is started, the LSI is forced ON and both cannot be
|
||||||
|
disabled. The counter starts counting down from the reset value (0xFFF).
|
||||||
|
When it reaches the end of count value (0x000) a reset signal is
|
||||||
|
generated (IWDG reset).
|
||||||
|
|
||||||
|
(+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
|
||||||
|
the IWDG_RLR value is reloaded into the counter and the watchdog reset
|
||||||
|
is prevented.
|
||||||
|
|
||||||
|
(+) The IWDG is implemented in the VDD voltage domain that is still functional
|
||||||
|
in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
|
||||||
|
IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
|
||||||
|
reset occurs.
|
||||||
|
|
||||||
|
(+) Debug mode: When the microcontroller enters debug mode (core halted),
|
||||||
|
the IWDG counter either continues to work normally or stops, depending
|
||||||
|
on DBG_IWDG_STOP configuration bit in DBG module, accessible through
|
||||||
|
__HAL_DBGMCU_FREEZE_IWDG1() or __HAL_DBGMCU_FREEZE2_IWDG2() and
|
||||||
|
__HAL_DBGMCU_UnFreeze_IWDG1 or __HAL_DBGMCU_UnFreeze2_IWDG2() macros.
|
||||||
|
|
||||||
|
[..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
|
||||||
|
The IWDG timeout may vary due to LSI clock frequency dispersion.
|
||||||
|
STM32H7xx devices provide the capability to measure the LSI clock
|
||||||
|
frequency (LSI clock is internally connected to TIM16 CH1 input capture).
|
||||||
|
The measured value can be used to have an IWDG timeout with an
|
||||||
|
acceptable accuracy.
|
||||||
|
|
||||||
|
[..] Default timeout value (necessary for IWDG_SR status register update):
|
||||||
|
Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
|
||||||
|
This frequency being subject to variations as mentioned above, the
|
||||||
|
default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
|
||||||
|
below) may become too short or too long.
|
||||||
|
In such cases, this default timeout value can be tuned by redefining
|
||||||
|
the constant LSI_VALUE at user-application level (based, for instance,
|
||||||
|
on the measured LSI clock frequency as explained above).
|
||||||
|
|
||||||
|
##### How to use this driver #####
|
||||||
|
==============================================================================
|
||||||
|
[..]
|
||||||
|
(#) Use IWDG using HAL_IWDG_Init() function to :
|
||||||
|
(++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
|
||||||
|
clock is forced ON and IWDG counter starts counting down.
|
||||||
|
(++) Enable write access to configuration registers:
|
||||||
|
IWDG_PR, IWDG_RLR and IWDG_WINR.
|
||||||
|
(++) Configure the IWDG prescaler and counter reload value. This reload
|
||||||
|
value will be loaded in the IWDG counter each time the watchdog is
|
||||||
|
reloaded, then the IWDG will start counting down from this value.
|
||||||
|
(++) Depending on window parameter:
|
||||||
|
(+++) If Window Init parameter is same as Window register value,
|
||||||
|
nothing more is done but reload counter value in order to exit
|
||||||
|
function with exact time base.
|
||||||
|
(+++) Else modify Window register. This will automatically reload
|
||||||
|
watchdog counter.
|
||||||
|
(++) Wait for status flags to be reset.
|
||||||
|
|
||||||
|
(#) Then the application program must refresh the IWDG counter at regular
|
||||||
|
intervals during normal operation to prevent an MCU reset, using
|
||||||
|
HAL_IWDG_Refresh() function.
|
||||||
|
|
||||||
|
*** IWDG HAL driver macros list ***
|
||||||
|
====================================
|
||||||
|
[..]
|
||||||
|
Below the list of most used macros in IWDG HAL driver:
|
||||||
|
(+) __HAL_IWDG_START: Enable the IWDG peripheral
|
||||||
|
(+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
|
||||||
|
the reload register
|
||||||
|
|
||||||
|
@endverbatim
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32h7xx_hal.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32H7xx_HAL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||||
|
/** @addtogroup IWDG
|
||||||
|
* @brief IWDG HAL module driver.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/** @defgroup IWDG_Private_Defines IWDG Private Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Status register needs up to 5 LSI clock periods divided by the clock
|
||||||
|
prescaler to be updated. The number of LSI clock periods is upper-rounded to
|
||||||
|
6 for the timeout value calculation.
|
||||||
|
The timeout value is calculated using the highest prescaler (256) and
|
||||||
|
the LSI_VALUE constant. The value of this constant can be changed by the user
|
||||||
|
to take into account possible LSI clock period variations.
|
||||||
|
The timeout value is multiplied by 1000 to be converted in milliseconds.
|
||||||
|
LSI startup time is also considered here by adding LSI_STARTUP_TIME
|
||||||
|
converted in milliseconds. */
|
||||||
|
#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \
|
||||||
|
((LSI_STARTUP_TIME / 1000UL) + 1UL))
|
||||||
|
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @addtogroup IWDG_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup IWDG_Exported_Functions_Group1
|
||||||
|
* @brief Initialization and Start functions.
|
||||||
|
*
|
||||||
|
@verbatim
|
||||||
|
===============================================================================
|
||||||
|
##### Initialization and Start functions #####
|
||||||
|
===============================================================================
|
||||||
|
[..] This section provides functions allowing to:
|
||||||
|
(+) Initialize the IWDG according to the specified parameters in the
|
||||||
|
IWDG_InitTypeDef of associated handle.
|
||||||
|
(+) Manage Window option.
|
||||||
|
(+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
|
||||||
|
is reloaded in order to exit function with correct time base.
|
||||||
|
|
||||||
|
@endverbatim
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initialize the IWDG according to the specified parameters in the
|
||||||
|
* IWDG_InitTypeDef and start watchdog. Before exiting function,
|
||||||
|
* watchdog is refreshed in order to have correct time base.
|
||||||
|
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified IWDG module.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
|
||||||
|
{
|
||||||
|
uint32_t tickstart;
|
||||||
|
|
||||||
|
/* Check the IWDG handle allocation */
|
||||||
|
if (hiwdg == NULL)
|
||||||
|
{
|
||||||
|
return HAL_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
|
||||||
|
assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
|
||||||
|
assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
|
||||||
|
assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
|
||||||
|
|
||||||
|
/* Enable IWDG. LSI is turned on automatically */
|
||||||
|
__HAL_IWDG_START(hiwdg);
|
||||||
|
|
||||||
|
/* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
|
||||||
|
0x5555 in KR */
|
||||||
|
IWDG_ENABLE_WRITE_ACCESS(hiwdg);
|
||||||
|
|
||||||
|
/* Write to IWDG registers the Prescaler & Reload values to work with */
|
||||||
|
hiwdg->Instance->PR = hiwdg->Init.Prescaler;
|
||||||
|
hiwdg->Instance->RLR = hiwdg->Init.Reload;
|
||||||
|
|
||||||
|
/* Check pending flag, if previous update not done, return timeout */
|
||||||
|
tickstart = HAL_GetTick();
|
||||||
|
|
||||||
|
/* Wait for register to be updated */
|
||||||
|
while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
|
||||||
|
{
|
||||||
|
if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
|
||||||
|
{
|
||||||
|
if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
|
||||||
|
{
|
||||||
|
return HAL_TIMEOUT;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* If window parameter is different than current value, modify window
|
||||||
|
register */
|
||||||
|
if (hiwdg->Instance->WINR != hiwdg->Init.Window)
|
||||||
|
{
|
||||||
|
/* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
|
||||||
|
even if window feature is disabled, Watchdog will be reloaded by writing
|
||||||
|
windows register */
|
||||||
|
hiwdg->Instance->WINR = hiwdg->Init.Window;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Reload IWDG counter with value defined in the reload register */
|
||||||
|
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Return function status */
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup IWDG_Exported_Functions_Group2
|
||||||
|
* @brief IO operation functions
|
||||||
|
*
|
||||||
|
@verbatim
|
||||||
|
===============================================================================
|
||||||
|
##### IO operation functions #####
|
||||||
|
===============================================================================
|
||||||
|
[..] This section provides functions allowing to:
|
||||||
|
(+) Refresh the IWDG.
|
||||||
|
|
||||||
|
@endverbatim
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Refresh the IWDG.
|
||||||
|
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
|
||||||
|
* the configuration information for the specified IWDG module.
|
||||||
|
* @retval HAL status
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
|
||||||
|
{
|
||||||
|
/* Reload IWDG counter with value defined in the reload register */
|
||||||
|
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
|
||||||
|
|
||||||
|
/* Return function status */
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
Reference in new issue
Block a user