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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-10-15 LZerro compatible with RT-Studio
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* 2025-10-22 kurisaw optimize multi-channel GPIO configuration
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*/
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#ifndef __ADC_CONFIG_H__
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#define __ADC_CONFIG_H__
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#include <rtthread.h>
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#include <board.h>
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include "drv_adc.h"
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#ifdef RT_USING_ADC
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#define MAX_EXTERN_ADC_CHANNEL 20
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#endif
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#ifdef BSP_USING_ADC0
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#ifdef BSP_ADC0_CH0_PIN
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#define ADC0_CH0_PIN BSP_ADC0_CH0_PIN
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#else
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#define ADC0_CH0_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH1_PIN
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#define ADC0_CH1_PIN BSP_ADC0_CH1_PIN
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#else
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#define ADC0_CH1_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH2_PIN
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#define ADC0_CH2_PIN BSP_ADC0_CH2_PIN
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#else
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#define ADC0_CH2_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH3_PIN
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#define ADC0_CH3_PIN BSP_ADC0_CH3_PIN
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#else
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#define ADC0_CH3_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH4_PIN
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#define ADC0_CH4_PIN BSP_ADC0_CH4_PIN
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#else
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#define ADC0_CH4_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH5_PIN
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#define ADC0_CH5_PIN BSP_ADC0_CH5_PIN
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#else
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#define ADC0_CH5_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH6_PIN
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#define ADC0_CH6_PIN BSP_ADC0_CH6_PIN
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#else
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#define ADC0_CH6_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH7_PIN
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#define ADC0_CH7_PIN BSP_ADC0_CH7_PIN
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#else
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#define ADC0_CH7_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH8_PIN
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#define ADC0_CH8_PIN BSP_ADC0_CH8_PIN
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#else
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#define ADC0_CH8_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH9_PIN
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#define ADC0_CH9_PIN BSP_ADC0_CH9_PIN
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#else
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#define ADC0_CH9_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH10_PIN
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#define ADC0_CH10_PIN BSP_ADC0_CH10_PIN
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#else
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#define ADC0_CH10_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH11_PIN
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#define ADC0_CH11_PIN BSP_ADC0_CH11_PIN
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#else
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#define ADC0_CH11_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH12_PIN
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#define ADC0_CH12_PIN BSP_ADC0_CH12_PIN
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#else
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#define ADC0_CH12_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH13_PIN
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#define ADC0_CH13_PIN BSP_ADC0_CH13_PIN
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#else
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#define ADC0_CH13_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH14_PIN
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#define ADC0_CH14_PIN BSP_ADC0_CH14_PIN
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#else
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#define ADC0_CH14_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH15_PIN
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#define ADC0_CH15_PIN BSP_ADC0_CH15_PIN
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#else
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#define ADC0_CH15_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH16_PIN
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#define ADC0_CH16_PIN BSP_ADC0_CH16_PIN
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#else
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#define ADC0_CH16_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH17_PIN
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#define ADC0_CH17_PIN BSP_ADC0_CH17_PIN
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#else
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#define ADC0_CH17_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH18_PIN
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#define ADC0_CH18_PIN BSP_ADC0_CH18_PIN
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#else
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#define ADC0_CH18_PIN RT_NULL
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#endif
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#ifdef BSP_ADC0_CH19_PIN
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#define ADC0_CH19_PIN BSP_ADC0_CH19_PIN
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#else
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#define ADC0_CH19_PIN RT_NULL
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#endif
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#ifndef ADC0_CONFIG
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#define ADC0_CONFIG \
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{ \
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ADC0, \
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RCU_ADC0, \
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{ \
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ADC0_CH0_PIN, \
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ADC0_CH1_PIN, \
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ADC0_CH2_PIN, \
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ADC0_CH3_PIN, \
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ADC0_CH4_PIN, \
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ADC0_CH5_PIN, \
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ADC0_CH6_PIN, \
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ADC0_CH7_PIN, \
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ADC0_CH8_PIN, \
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ADC0_CH9_PIN, \
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ADC0_CH10_PIN, \
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ADC0_CH11_PIN, \
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ADC0_CH12_PIN, \
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ADC0_CH13_PIN, \
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ADC0_CH14_PIN, \
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ADC0_CH15_PIN, \
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ADC0_CH16_PIN, \
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ADC0_CH17_PIN, \
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ADC0_CH18_PIN, \
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ADC0_CH19_PIN, \
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}, \
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&adc0, \
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"adc0", \
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}
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#endif /* ADC0_CONFIG */
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#endif /* BSP_USING_ADC0 */
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#ifdef BSP_USING_ADC1
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#ifdef BSP_ADC1_CH0_PIN
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#define ADC1_CH0_PIN BSP_ADC1_CH0_PIN
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#else
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#define ADC1_CH0_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH1_PIN
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#define ADC1_CH1_PIN BSP_ADC1_CH1_PIN
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#else
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#define ADC1_CH1_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH2_PIN
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#define ADC1_CH2_PIN BSP_ADC1_CH2_PIN
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#else
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#define ADC1_CH2_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH3_PIN
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#define ADC1_CH3_PIN BSP_ADC1_CH3_PIN
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#else
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#define ADC1_CH3_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH4_PIN
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#define ADC1_CH4_PIN BSP_ADC1_CH4_PIN
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#else
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#define ADC1_CH4_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH5_PIN
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#define ADC1_CH5_PIN BSP_ADC1_CH5_PIN
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#else
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#define ADC1_CH5_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH6_PIN
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#define ADC1_CH6_PIN BSP_ADC1_CH6_PIN
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#else
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#define ADC1_CH6_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH7_PIN
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#define ADC1_CH7_PIN BSP_ADC1_CH7_PIN
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#else
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#define ADC1_CH7_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH8_PIN
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#define ADC1_CH8_PIN BSP_ADC1_CH8_PIN
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#else
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#define ADC1_CH8_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH9_PIN
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#define ADC1_CH9_PIN BSP_ADC1_CH9_PIN
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#else
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#define ADC1_CH9_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH10_PIN
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#define ADC1_CH10_PIN BSP_ADC1_CH10_PIN
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#else
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#define ADC1_CH10_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH11_PIN
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#define ADC1_CH11_PIN BSP_ADC1_CH11_PIN
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#else
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#define ADC1_CH11_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH12_PIN
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#define ADC1_CH12_PIN BSP_ADC1_CH12_PIN
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#else
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#define ADC1_CH12_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH13_PIN
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#define ADC1_CH13_PIN BSP_ADC1_CH13_PIN
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#else
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#define ADC1_CH13_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH14_PIN
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#define ADC1_CH14_PIN BSP_ADC1_CH14_PIN
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#else
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#define ADC1_CH14_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH15_PIN
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#define ADC1_CH15_PIN BSP_ADC1_CH15_PIN
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#else
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#define ADC1_CH15_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH16_PIN
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#define ADC1_CH16_PIN BSP_ADC1_CH16_PIN
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#else
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#define ADC1_CH16_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH17_PIN
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#define ADC1_CH17_PIN BSP_ADC1_CH17_PIN
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#else
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#define ADC1_CH17_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH18_PIN
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#define ADC1_CH18_PIN BSP_ADC1_CH18_PIN
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#else
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#define ADC1_CH18_PIN RT_NULL
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#endif
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#ifdef BSP_ADC1_CH19_PIN
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#define ADC1_CH19_PIN BSP_ADC1_CH19_PIN
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#else
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#define ADC1_CH19_PIN RT_NULL
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#endif
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#ifndef ADC1_CONFIG
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#define ADC1_CONFIG \
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{ \
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ADC1, \
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RCU_ADC1, \
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{ \
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ADC1_CH0_PIN, \
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ADC1_CH1_PIN, \
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ADC1_CH2_PIN, \
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ADC1_CH3_PIN, \
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ADC1_CH4_PIN, \
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ADC1_CH5_PIN, \
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ADC1_CH6_PIN, \
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ADC1_CH7_PIN, \
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ADC1_CH8_PIN, \
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ADC1_CH9_PIN, \
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ADC1_CH10_PIN, \
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ADC1_CH11_PIN, \
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ADC1_CH12_PIN, \
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ADC1_CH13_PIN, \
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ADC1_CH14_PIN, \
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ADC1_CH15_PIN, \
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ADC1_CH16_PIN, \
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ADC1_CH17_PIN, \
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ADC1_CH18_PIN, \
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ADC1_CH19_PIN, \
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}, \
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&adc1, \
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"adc1", \
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}
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#endif /* ADC1_CONFIG */
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#endif /* BSP_USING_ADC1 */
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#ifdef BSP_USING_ADC2
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#ifdef BSP_ADC2_CH0_PIN
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#define ADC2_CH0_PIN BSP_ADC2_CH0_PIN
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#else
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#define ADC2_CH0_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH1_PIN
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#define ADC2_CH1_PIN BSP_ADC2_CH1_PIN
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#else
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#define ADC2_CH1_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH2_PIN
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#define ADC2_CH2_PIN BSP_ADC2_CH2_PIN
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#else
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#define ADC2_CH2_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH3_PIN
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#define ADC2_CH3_PIN BSP_ADC2_CH3_PIN
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#else
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#define ADC2_CH3_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH4_PIN
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#define ADC2_CH4_PIN BSP_ADC2_CH4_PIN
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#else
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#define ADC2_CH4_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH5_PIN
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#define ADC2_CH5_PIN BSP_ADC2_CH5_PIN
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#else
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#define ADC2_CH5_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH6_PIN
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#define ADC2_CH6_PIN BSP_ADC2_CH6_PIN
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#else
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#define ADC2_CH6_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH7_PIN
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#define ADC2_CH7_PIN BSP_ADC2_CH7_PIN
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#else
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#define ADC2_CH7_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH8_PIN
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#define ADC2_CH8_PIN BSP_ADC2_CH8_PIN
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#else
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#define ADC2_CH8_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH9_PIN
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#define ADC2_CH9_PIN BSP_ADC2_CH9_PIN
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#else
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#define ADC2_CH9_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH10_PIN
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#define ADC2_CH10_PIN BSP_ADC2_CH10_PIN
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#else
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#define ADC2_CH10_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH11_PIN
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#define ADC2_CH11_PIN BSP_ADC2_CH11_PIN
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#else
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#define ADC2_CH11_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH12_PIN
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#define ADC2_CH12_PIN BSP_ADC2_CH12_PIN
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#else
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#define ADC2_CH12_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH13_PIN
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#define ADC2_CH13_PIN BSP_ADC2_CH13_PIN
|
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#else
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#define ADC2_CH13_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH14_PIN
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#define ADC2_CH14_PIN BSP_ADC2_CH14_PIN
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#else
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#define ADC2_CH14_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH15_PIN
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#define ADC2_CH15_PIN BSP_ADC2_CH15_PIN
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#else
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#define ADC2_CH15_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH16_PIN
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#define ADC2_CH16_PIN BSP_ADC2_CH16_PIN
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#else
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||||
#define ADC2_CH16_PIN RT_NULL
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#endif
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#ifdef BSP_ADC2_CH17_PIN
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#define ADC2_CH17_PIN BSP_ADC2_CH17_PIN
|
||||
#else
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||||
#define ADC2_CH17_PIN RT_NULL
|
||||
#endif
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||||
#ifdef BSP_ADC2_CH18_PIN
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#define ADC2_CH18_PIN BSP_ADC2_CH18_PIN
|
||||
#else
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||||
#define ADC2_CH18_PIN RT_NULL
|
||||
#endif
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||||
#ifdef BSP_ADC2_CH19_PIN
|
||||
#define ADC2_CH19_PIN BSP_ADC2_CH19_PIN
|
||||
#else
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||||
#define ADC2_CH19_PIN RT_NULL
|
||||
#endif
|
||||
|
||||
#ifndef ADC2_CONFIG
|
||||
#define ADC2_CONFIG \
|
||||
{ \
|
||||
ADC2, \
|
||||
RCU_ADC2, \
|
||||
{ \
|
||||
ADC2_CH0_PIN, \
|
||||
ADC2_CH1_PIN, \
|
||||
ADC2_CH2_PIN, \
|
||||
ADC2_CH3_PIN, \
|
||||
ADC2_CH4_PIN, \
|
||||
ADC2_CH5_PIN, \
|
||||
ADC2_CH6_PIN, \
|
||||
ADC2_CH7_PIN, \
|
||||
ADC2_CH8_PIN, \
|
||||
ADC2_CH9_PIN, \
|
||||
ADC2_CH10_PIN, \
|
||||
ADC2_CH11_PIN, \
|
||||
ADC2_CH12_PIN, \
|
||||
ADC2_CH13_PIN, \
|
||||
ADC2_CH14_PIN, \
|
||||
ADC2_CH15_PIN, \
|
||||
ADC2_CH16_PIN, \
|
||||
ADC2_CH17_PIN, \
|
||||
ADC2_CH18_PIN, \
|
||||
ADC2_CH19_PIN, \
|
||||
}, \
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&adc2, \
|
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"adc2", \
|
||||
}
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||||
#endif /* ADC2_CONFIG */
|
||||
#endif /* BSP_USING_ADC2 */
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||||
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#ifdef __cplusplus
|
||||
}
|
||||
#endif
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||||
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#endif // __ADC_CONFIG_H__
|
||||
@@ -0,0 +1,83 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-10-22 WangShun compatible with RT-Studio
|
||||
*/
|
||||
|
||||
#ifndef __CAN_CONFIG_H__
|
||||
#define __CAN_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <board.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_CAN0)
|
||||
#ifndef BSP_CAN0_RX_PIN
|
||||
#define BSP_CAN0_RX_PIN "PD0"
|
||||
#define BSP_CAN0_TX_PIN "PD1"
|
||||
#define BSP_CAN0_AFIO "AF9"
|
||||
#endif /* BSP_CAN0_RX_PIN */
|
||||
#ifndef CAN0_CONFIG
|
||||
#define CAN0_CONFIG \
|
||||
{ \
|
||||
.name = "can0", \
|
||||
.can_periph = CAN0, \
|
||||
.tx_pin_name = BSP_CAN0_TX_PIN, \
|
||||
.rx_pin_name = BSP_CAN0_RX_PIN, \
|
||||
.alternate = BSP_CAN0_AFIO, \
|
||||
.device = &dev_can0, \
|
||||
}
|
||||
#endif /* CAN0_CONFIG */
|
||||
#endif /* BSP_USING_CAN0 */
|
||||
|
||||
#if defined(BSP_USING_CAN1)
|
||||
#ifndef BSP_CAN1_RX_PIN
|
||||
#define BSP_CAN1_RX_PIN "PB5"
|
||||
#define BSP_CAN1_TX_PIN "PB6"
|
||||
#define BSP_CAN1_AFIO "AF9"
|
||||
#endif /* BSP_CAN0_RX_PIN */
|
||||
#ifndef CAN1_CONFIG
|
||||
#define CAN1_CONFIG \
|
||||
{ \
|
||||
.name = "can1", \
|
||||
.can_periph = CAN1, \
|
||||
.tx_pin_name = BSP_CAN1_TX_PIN, \
|
||||
.rx_pin_name = BSP_CAN1_RX_PIN, \
|
||||
.alternate = BSP_CAN1_AFIO, \
|
||||
.device = &dev_can1, \
|
||||
}
|
||||
#endif /* CAN1_CONFIG */
|
||||
#endif /* BSP_USING_CAN1 */
|
||||
|
||||
#if defined(BSP_USING_CAN2)
|
||||
#ifndef BSP_CAN2_RX_PIN
|
||||
#define BSP_CAN2_RX_PIN "PD12"
|
||||
#define BSP_CAN2_TX_PIN "PD13"
|
||||
#define BSP_CAN2_AFIO "AF5"
|
||||
#endif /* BSP_CAN2_RX_PIN */
|
||||
#ifndef CAN2_CONFIG
|
||||
#define CAN2_CONFIG \
|
||||
{ \
|
||||
.name = "can2", \
|
||||
.can_periph = CAN2, \
|
||||
.tx_pin_name = BSP_CAN2_TX_PIN, \
|
||||
.rx_pin_name = BSP_CAN2_RX_PIN, \
|
||||
.alternate = BSP_CAN2_AFIO, \
|
||||
.device = &dev_can2, \
|
||||
}
|
||||
#endif /* CAN2_CONFIG */
|
||||
#endif /* BSP_USING_CAN2 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CAN_CONFIG_H__ */
|
||||
|
||||
@@ -0,0 +1,51 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-10-11 kurisaw first version
|
||||
*/
|
||||
|
||||
#ifndef __DAC_CONFIG_H__
|
||||
#define __DAC_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <board.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_DAC0
|
||||
|
||||
#ifndef DAC0_CONFIG
|
||||
#define DAC0_CONFIG \
|
||||
{ \
|
||||
.dac_periph = DAC0, \
|
||||
.name = "dac0", \
|
||||
.pin_name = BSP_DAC0_PIN, \
|
||||
.channel = BSP_DAC0_CHANNEL, \
|
||||
}
|
||||
#endif /* DAC0_CONFIG */
|
||||
#endif /* BSP_USING_DAC0 */
|
||||
|
||||
#ifdef BSP_USING_DAC1
|
||||
|
||||
#ifndef DAC1_CONFIG
|
||||
#define DAC1_CONFIG \
|
||||
{ \
|
||||
.dac_periph = DAC0, \
|
||||
.name = "dac1", \
|
||||
.pin_name = BSP_DAC1_PIN, \
|
||||
.channel = BSP_DAC1_CHANNEL, \
|
||||
}
|
||||
#endif /* DAC1_CONFIG */
|
||||
#endif /* BSP_USING_DAC1 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__DAC_CONFIG_H__ */
|
||||
@@ -0,0 +1,59 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2021, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-11-10 kurisaw ENET configuration
|
||||
*/
|
||||
|
||||
#ifndef __ENET_CONFIG_H__
|
||||
#define __ENET_CONFIG_H__
|
||||
|
||||
#include "drv_enet.h"
|
||||
#if defined(RT_USING_SAL) && defined(RT_USING_NETDEV) && defined(RT_USING_LWIP)
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* ENET pin configuration table for RMII interface */
|
||||
const struct enet_pin_config enet0_pins[] =
|
||||
{
|
||||
/* ETH_RMII_REF_CLK */ {"PA1", "AF11"},
|
||||
/* ETH_MDIO */ {"PA2", "AF11"},
|
||||
/* ETH_RMII_CRS_DV */ {"PA7", "AF11"},
|
||||
/* ETH_RMII_TX_EN */ {"PG11", "AF11"},
|
||||
/* ETH_RMII_TXD0 */ {"PB12", "AF11"},
|
||||
/* ETH_RMII_TXD1 */ {"PG12", "AF11"},
|
||||
/* ETH_MDC */ {"PC1", "AF11"},
|
||||
/* ETH_RMII_RXD0 */ {"PC4", "AF11"},
|
||||
/* ETH_RMII_RXD1 */ {"PC5", "AF11"},
|
||||
};
|
||||
|
||||
/* Clock output pin for PHY */
|
||||
const struct enet_pin_config enet_clock_pin = {
|
||||
"PA8", "AF0" /* Clock output for PHY */
|
||||
};
|
||||
|
||||
/* ENET configuration */
|
||||
const struct enet_config enet0_cfg = {
|
||||
.pins = enet0_pins,
|
||||
.pin_count = sizeof(enet0_pins) / sizeof(enet0_pins[0]),
|
||||
.enet_periph = ENET0,
|
||||
.enet_clk = RCU_ENET0,
|
||||
.enet_tx_clk = RCU_ENET0TX,
|
||||
.enet_rx_clk = RCU_ENET0RX,
|
||||
.phy_interface = SYSCFG_ENET_PHY_RMII,
|
||||
.speed = GPIO_OSPEED_100_220MHZ,
|
||||
.otype = GPIO_OTYPE_PP,
|
||||
.pupd = GPIO_PUPD_NONE,
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* RT_USING_SAL && RT_USING_NETDEV && RT_USING_LWIP */
|
||||
#endif /* __ENET_CONFIG_H__ */
|
||||
@@ -0,0 +1,195 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-10-22 kurisaw initial commit
|
||||
*/
|
||||
|
||||
#ifndef __HWTIMER_CONFIG_H__
|
||||
#define __HWTIMER_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <board.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "drv_hwtimer.h"
|
||||
|
||||
#ifdef BSP_USING_HWTIMER0
|
||||
#ifndef HWTIMER0_CONFIG
|
||||
#define HWTIMER0_CONFIG \
|
||||
{ \
|
||||
"timer0", \
|
||||
{ \
|
||||
TIMER0, \
|
||||
TIMER0_UP_IRQn, \
|
||||
RCU_TIMER0, \
|
||||
}, \
|
||||
{ 0 }, \
|
||||
{ \
|
||||
10000000, /* max frequency */ \
|
||||
1000, /* min frequency */ \
|
||||
0xFFFF, /* 16-bit counter */ \
|
||||
HWTIMER_CNTMODE_UP, /* count up mode */ \
|
||||
}, \
|
||||
}
|
||||
#endif /* HWTIMER0_CONFIG */
|
||||
#endif /* BSP_USING_HWTIMER0 */
|
||||
|
||||
#ifdef BSP_USING_HWTIMER1
|
||||
#ifndef HWTIMER1_CONFIG
|
||||
#define HWTIMER1_CONFIG \
|
||||
{ \
|
||||
"timer1", \
|
||||
{ \
|
||||
TIMER1, \
|
||||
TIMER1_IRQn, \
|
||||
RCU_TIMER1, \
|
||||
}, \
|
||||
{ 0 }, \
|
||||
{ \
|
||||
10000000, \
|
||||
1000, \
|
||||
0xFFFFFFFF, /* 32-bit counter */ \
|
||||
HWTIMER_CNTMODE_UP, \
|
||||
}, \
|
||||
}
|
||||
#endif /* HWTIMER1_CONFIG */
|
||||
#endif /* BSP_USING_HWTIMER1 */
|
||||
|
||||
#ifdef BSP_USING_HWTIMER2
|
||||
#ifndef HWTIMER2_CONFIG
|
||||
#define HWTIMER2_CONFIG \
|
||||
{ \
|
||||
"timer2", \
|
||||
{ \
|
||||
TIMER2, \
|
||||
TIMER2_IRQn, \
|
||||
RCU_TIMER2, \
|
||||
}, \
|
||||
{ 0 }, \
|
||||
{ \
|
||||
10000000, \
|
||||
1000, \
|
||||
0xFFFF, /* 16-bit counter */ \
|
||||
HWTIMER_CNTMODE_UP, \
|
||||
}, \
|
||||
}
|
||||
#endif /* HWTIMER2_CONFIG */
|
||||
#endif /* BSP_USING_HWTIMER2 */
|
||||
|
||||
#ifdef BSP_USING_HWTIMER3
|
||||
#ifndef HWTIMER3_CONFIG
|
||||
#define HWTIMER3_CONFIG \
|
||||
{ \
|
||||
"timer3", \
|
||||
{ \
|
||||
TIMER3, \
|
||||
TIMER3_IRQn, \
|
||||
RCU_TIMER3, \
|
||||
}, \
|
||||
{ 0 }, \
|
||||
{ \
|
||||
10000000, \
|
||||
1000, \
|
||||
0xFFFF, /* 16-bit counter */ \
|
||||
HWTIMER_CNTMODE_UP, \
|
||||
}, \
|
||||
}
|
||||
#endif /* HWTIMER3_CONFIG */
|
||||
#endif /* BSP_USING_HWTIMER3 */
|
||||
|
||||
#ifdef BSP_USING_HWTIMER4
|
||||
#ifndef HWTIMER4_CONFIG
|
||||
#define HWTIMER4_CONFIG \
|
||||
{ \
|
||||
"timer4", \
|
||||
{ \
|
||||
TIMER4, \
|
||||
TIMER4_IRQn, \
|
||||
RCU_TIMER4, \
|
||||
}, \
|
||||
{ 0 }, \
|
||||
{ \
|
||||
10000000, \
|
||||
1000, \
|
||||
0xFFFFFFFF, /* 32-bit counter */ \
|
||||
HWTIMER_CNTMODE_UP, \
|
||||
}, \
|
||||
}
|
||||
#endif /* HWTIMER4_CONFIG */
|
||||
#endif /* BSP_USING_HWTIMER4 */
|
||||
|
||||
#ifdef BSP_USING_HWTIMER5
|
||||
#ifndef HWTIMER5_CONFIG
|
||||
#define HWTIMER5_CONFIG \
|
||||
{ \
|
||||
"timer5", \
|
||||
{ \
|
||||
TIMER5, \
|
||||
TIMER5_IRQn, \
|
||||
RCU_TIMER5, \
|
||||
}, \
|
||||
{ 0 }, \
|
||||
{ \
|
||||
10000000, \
|
||||
1000, \
|
||||
0xFFFFFFFF, /* 32-bit counter */ \
|
||||
HWTIMER_CNTMODE_UP, \
|
||||
}, \
|
||||
}
|
||||
#endif /* HWTIMER5_CONFIG */
|
||||
#endif /* BSP_USING_HWTIMER5 */
|
||||
|
||||
#ifdef BSP_USING_HWTIMER6
|
||||
#ifndef HWTIMER6_CONFIG
|
||||
#define HWTIMER6_CONFIG \
|
||||
{ \
|
||||
"timer6", \
|
||||
{ \
|
||||
TIMER6, \
|
||||
TIMER6_IRQn, \
|
||||
RCU_TIMER6, \
|
||||
}, \
|
||||
{ 0 }, \
|
||||
{ \
|
||||
10000000, \
|
||||
1000, \
|
||||
0xFFFFFFFF, /* 32-bit counter */ \
|
||||
HWTIMER_CNTMODE_UP, \
|
||||
}, \
|
||||
}
|
||||
#endif /* HWTIMER6_CONFIG */
|
||||
#endif /* BSP_USING_HWTIMER6 */
|
||||
|
||||
#ifdef BSP_USING_HWTIMER7
|
||||
#ifndef HWTIMER7_CONFIG
|
||||
#define HWTIMER7_CONFIG \
|
||||
{ \
|
||||
"timer7", \
|
||||
{ \
|
||||
TIMER7, \
|
||||
TIMER7_UP_IRQn, \
|
||||
RCU_TIMER7, \
|
||||
}, \
|
||||
{ 0 }, \
|
||||
{ \
|
||||
10000000, \
|
||||
1000, \
|
||||
0xFFFF, /* 16-bit counter */ \
|
||||
HWTIMER_CNTMODE_UP, \
|
||||
}, \
|
||||
}
|
||||
#endif /* HWTIMER7_CONFIG */
|
||||
#endif /* BSP_USING_HWTIMER7 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __HWTIMER_CONFIG_H__ */
|
||||
@@ -0,0 +1,146 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-10-10 WangShun compatible with RT-Studio
|
||||
*/
|
||||
|
||||
#ifndef __I2C_CONFIG_H__
|
||||
#define __I2C_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <board.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_I2C0
|
||||
#ifndef BSP_I2C0_SCL_PIN
|
||||
#define BSP_I2C0_SCL_PIN "PB6"
|
||||
#define BSP_I2C0_SDA_PIN "PB7"
|
||||
#define BSP_I2C0_AFIO "AF4"
|
||||
#endif /* BSP_I2C0_SCL_PIN */
|
||||
#ifndef I2C0_CONFIG
|
||||
#define I2C0_CONFIG \
|
||||
{ \
|
||||
.i2c_periph = I2C0, \
|
||||
.per_clk = RCU_I2C0, \
|
||||
.scl_pin_name = BSP_I2C0_SCL_PIN, \
|
||||
.sda_pin_name = BSP_I2C0_SDA_PIN, \
|
||||
.alternate = BSP_I2C0_AFIO, \
|
||||
.i2c_bus = &i2c0, \
|
||||
.device_name = "i2c0", \
|
||||
}
|
||||
#endif /* I2C0_CONFIG */
|
||||
#endif /* BSP_USING_I2C0 */
|
||||
|
||||
#ifdef BSP_USING_I2C1
|
||||
#ifndef BSP_I2C1_SCL_PIN
|
||||
#define BSP_I2C1_SCL_PIN "PH4"
|
||||
#define BSP_I2C1_SDA_PIN "PB11"
|
||||
#define BSP_I2C1_AFIO "AF4"
|
||||
#endif /* BSP_I2C1_SCL_PIN */
|
||||
#ifndef I2C1_CONFIG
|
||||
#define I2C1_CONFIG \
|
||||
{ \
|
||||
.i2c_periph = I2C1, \
|
||||
.per_clk = RCU_I2C1, \
|
||||
.scl_pin_name = BSP_I2C1_SCL_PIN, \
|
||||
.sda_pin_name = BSP_I2C1_SDA_PIN, \
|
||||
.alternate = BSP_I2C1_AFIO, \
|
||||
.i2c_bus = &i2c1, \
|
||||
.device_name = "i2c1", \
|
||||
}
|
||||
#endif /* I2C1_CONFIG */
|
||||
#endif /* BSP_USING_I2C1 */
|
||||
|
||||
#ifdef BSP_USING_I2C2
|
||||
#ifndef BSP_I2C2_SCL_PIN
|
||||
#define BSP_I2C2_SCL_PIN "PA8"
|
||||
#define BSP_I2C2_SDA_PIN "PC9"
|
||||
#define BSP_I2C2_AFIO "AF4"
|
||||
#endif /* BSP_I2C2_SCL_PIN */
|
||||
#ifndef I2C2_CONFIG
|
||||
#define I2C2_CONFIG \
|
||||
{ \
|
||||
.i2c_periph = I2C2, \
|
||||
.per_clk = RCU_I2C2, \
|
||||
.scl_pin_name = BSP_I2C2_SCL_PIN, \
|
||||
.sda_pin_name = BSP_I2C2_SDA_PIN, \
|
||||
.alternate = BSP_I2C2_AFIO, \
|
||||
.i2c_bus = &i2c2, \
|
||||
.device_name = "i2c2", \
|
||||
}
|
||||
#endif /* I2C2_CONFIG */
|
||||
#endif /* BSP_USING_I2C2 */
|
||||
|
||||
#ifdef BSP_USING_I2C3
|
||||
#ifndef BSP_I2C3_SCL_PIN
|
||||
#define BSP_I2C3_SCL_PIN "PD12"
|
||||
#define BSP_I2C3_SDA_PIN "PD13"
|
||||
#define BSP_I2C3_AFIO "AF4"
|
||||
#endif /* BSP_I2C3_SCL_PIN */
|
||||
#ifndef I2C3_CONFIG
|
||||
#define I2C3_CONFIG \
|
||||
{ \
|
||||
.i2c_periph = I2C3, \
|
||||
.per_clk = RCU_I2C3, \
|
||||
.scl_pin_name = BSP_I2C3_SCL_PIN, \
|
||||
.sda_pin_name = BSP_I2C3_SDA_PIN, \
|
||||
.alternate = BSP_I2C3_AFIO, \
|
||||
.i2c_bus = &i2c3, \
|
||||
.device_name = "i2c3", \
|
||||
}
|
||||
#endif /* I2C3_CONFIG */
|
||||
#endif /* BSP_USING_I2C3 */
|
||||
|
||||
#ifdef BSP_USING_I2C4
|
||||
#ifndef BSP_I2C4_SCL_PIN
|
||||
#define BSP_I2C4_SCL_PIN "PG7"
|
||||
#define BSP_I2C4_SDA_PIN "PG8"
|
||||
#define BSP_I2C4_AFIO "AF6"
|
||||
#endif /* BSP_I2C4_SCL_PIN */
|
||||
#ifndef I2C4_CONFIG
|
||||
#define I2C4_CONFIG \
|
||||
{ \
|
||||
.i2c_periph = I2C4, \
|
||||
.per_clk = RCU_I2C4, \
|
||||
.scl_pin_name = BSP_I2C4_SCL_PIN, \
|
||||
.sda_pin_name = BSP_I2C4_SDA_PIN, \
|
||||
.alternate = BSP_I2C4_AFIO, \
|
||||
.i2c_bus = &i2c4, \
|
||||
.device_name = "i2c4", \
|
||||
}
|
||||
#endif /* I2C4_CONFIG */
|
||||
#endif /* BSP_USING_I2C4 */
|
||||
|
||||
#ifdef BSP_USING_I2C5
|
||||
#ifndef BSP_I2C5_SCL_PIN
|
||||
#define BSP_I2C5_SCL_PIN "PF11"
|
||||
#define BSP_I2C5_SDA_PIN "PF12"
|
||||
#define BSP_I2C5_AFIO "AF4"
|
||||
#endif /* BSP_I2C5_SCL_PIN */
|
||||
#ifndef I2C5_CONFIG
|
||||
#define I2C5_CONFIG \
|
||||
{ \
|
||||
.i2c_periph = I2C5, \
|
||||
.per_clk = RCU_I2C5, \
|
||||
.scl_pin_name = BSP_I2C5_SCL_PIN, \
|
||||
.sda_pin_name = BSP_I2C5_SDA_PIN, \
|
||||
.alternate = BSP_I2C5_AFIO, \
|
||||
.i2c_bus = &i2c5, \
|
||||
.device_name = "i2c5", \
|
||||
}
|
||||
#endif /* I2C5_CONFIG */
|
||||
#endif /* BSP_USING_I2C5 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__I2C_CONFIG_H__ */
|
||||
|
||||
@@ -0,0 +1,145 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2025-10-11 kurisaw compatible with RT-Studio
|
||||
*/
|
||||
|
||||
#ifndef __PWM_CONFIG_H__
|
||||
#define __PWM_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <board.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_PWM0
|
||||
|
||||
#ifndef PWM0_CONFIG
|
||||
#define PWM0_CONFIG \
|
||||
{ \
|
||||
.timer_periph = TIMER0, \
|
||||
.name = "pwm0", \
|
||||
.timer_clk = RCU_TIMER0, \
|
||||
.pin_name = BSP_PWM0_PIN, \
|
||||
.channel = BSP_PWM0_CHANNEL, \
|
||||
.alternate = BSP_PWM0_AFIO, \
|
||||
}
|
||||
#endif /* PWM0_CONFIG */
|
||||
#endif /* BSP_USING_PWM0 */
|
||||
|
||||
#ifdef BSP_USING_PWM1
|
||||
|
||||
#ifndef PWM1_CONFIG
|
||||
#define PWM1_CONFIG \
|
||||
{ \
|
||||
.timer_periph = TIMER1, \
|
||||
.name = "pwm1", \
|
||||
.timer_clk = RCU_TIMER1, \
|
||||
.pin_name = BSP_PWM1_PIN, \
|
||||
.channel = BSP_PWM1_CHANNEL, \
|
||||
.alternate = BSP_PWM1_AFIO, \
|
||||
}
|
||||
#endif /* PWM1_CONFIG */
|
||||
#endif /* BSP_USING_PWM1 */
|
||||
|
||||
#ifdef BSP_USING_PWM2
|
||||
|
||||
#ifndef PWM2_CONFIG
|
||||
#define PWM2_CONFIG \
|
||||
{ \
|
||||
.timer_periph = TIMER2, \
|
||||
.name = "pwm2", \
|
||||
.timer_clk = RCU_TIMER2, \
|
||||
.pin_name = BSP_PWM2_PIN, \
|
||||
.channel = BSP_PWM2_CHANNEL, \
|
||||
.alternate = BSP_PWM2_AFIO, \
|
||||
}
|
||||
#endif /* PWM2_CONFIG */
|
||||
#endif /* BSP_USING_PWM2 */
|
||||
|
||||
#ifdef BSP_USING_PWM3
|
||||
|
||||
#ifndef PWM3_CONFIG
|
||||
#define PWM3_CONFIG \
|
||||
{ \
|
||||
.timer_periph = TIMER3, \
|
||||
.name = "pwm3", \
|
||||
.timer_clk = RCU_TIMER3, \
|
||||
.pin_name = BSP_PWM3_PIN, \
|
||||
.channel = BSP_PWM3_CHANNEL, \
|
||||
.alternate = BSP_PWM3_AFIO, \
|
||||
}
|
||||
#endif /* PWM3_CONFIG */
|
||||
#endif /* BSP_USING_PWM3 */
|
||||
|
||||
#ifdef BSP_USING_PWM4
|
||||
|
||||
#ifndef PWM4_CONFIG
|
||||
#define PWM4_CONFIG \
|
||||
{ \
|
||||
.timer_periph = TIMER4, \
|
||||
.name = "pwm4", \
|
||||
.timer_clk = RCU_TIMER4, \
|
||||
.pin_name = BSP_PWM4_PIN, \
|
||||
.channel = BSP_PWM4_CHANNEL, \
|
||||
.alternate = BSP_PWM4_AFIO, \
|
||||
}
|
||||
#endif /* PWM4_CONFIG */
|
||||
#endif /* BSP_USING_PWM4 */
|
||||
|
||||
#ifdef BSP_USING_PWM5
|
||||
|
||||
#ifndef PWM5_CONFIG
|
||||
#define PWM5_CONFIG \
|
||||
{ \
|
||||
.timer_periph = TIMER5, \
|
||||
.name = "pwm5", \
|
||||
.timer_clk = RCU_TIMER5, \
|
||||
.pin_name = BSP_PWM5_PIN, \
|
||||
.channel = BSP_PWM5_CHANNEL, \
|
||||
.alternate = BSP_PWM5_AFIO, \
|
||||
}
|
||||
#endif /* PWM5_CONFIG */
|
||||
#endif /* BSP_USING_PWM5 */
|
||||
|
||||
#ifdef BSP_USING_PWM6
|
||||
|
||||
#ifndef PWM6_CONFIG
|
||||
#define PWM6_CONFIG \
|
||||
{ \
|
||||
.timer_periph = TIMER6, \
|
||||
.name = "pwm6", \
|
||||
.timer_clk = RCU_TIMER6, \
|
||||
.pin_name = BSP_PWM6_PIN, \
|
||||
.channel = BSP_PWM6_CHANNEL, \
|
||||
.alternate = BSP_PWM6_AFIO, \
|
||||
}
|
||||
#endif /* PWM6_CONFIG */
|
||||
#endif /* BSP_USING_PWM6 */
|
||||
|
||||
#ifdef BSP_USING_PWM7
|
||||
|
||||
#ifndef PWM7_CONFIG
|
||||
#define PWM7_CONFIG \
|
||||
{ \
|
||||
.timer_periph = TIMER7, \
|
||||
.name = "pwm7", \
|
||||
.timer_clk = RCU_TIMER7, \
|
||||
.pin_name = BSP_PWM7_PIN, \
|
||||
.channel = BSP_PWM7_CHANNEL, \
|
||||
.alternate = BSP_PWM7_AFIO, \
|
||||
}
|
||||
#endif /* PWM7_CONFIG */
|
||||
#endif /* BSP_USING_PWM7 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__PWM_CONFIG_H__ */
|
||||
@@ -0,0 +1,178 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-11-06 SummerGift first version
|
||||
* 2019-01-03 zylx modify DMA support
|
||||
* 2025-10-10 WangShun compatible with RT-Studio
|
||||
*/
|
||||
|
||||
#ifndef __SPI_CONFIG_H__
|
||||
#define __SPI_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <board.h>
|
||||
|
||||
#ifdef RT_SPI_USING_DMA
|
||||
#define IF_SPI_DMA(x) x
|
||||
#else
|
||||
#define IF_SPI_DMA(x)
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SPI0
|
||||
#ifndef BSP_SPI0_SCK_PIN
|
||||
#define BSP_SPI0_SCK_PIN "PA5"
|
||||
#define BSP_SPI0_MISO_PIN "PA6"
|
||||
#define BSP_SPI0_MOSI_PIN "PA7"
|
||||
#define BSP_SPI0_AFIO "AF5"
|
||||
#endif /* BSP_SPI0_SCK_PIN */
|
||||
|
||||
#ifndef SPI0_BUS_CONFIG
|
||||
#define SPI0_BUS_CONFIG \
|
||||
{ \
|
||||
.spi_periph = SPI0, \
|
||||
.bus_name = "spi0", \
|
||||
.spi_clk = RCU_SPI0, \
|
||||
.spi_bus = &spi_bus0, \
|
||||
.sck_pin_name = BSP_SPI0_SCK_PIN, \
|
||||
.miso_pin_name = BSP_SPI0_MISO_PIN, \
|
||||
.mosi_pin_name = BSP_SPI0_MOSI_PIN, \
|
||||
.alternate = BSP_SPI0_AFIO, \
|
||||
IF_SPI_DMA(.spi_dma = &spi_dma[0]) \
|
||||
}
|
||||
#endif /* SPI0_BUS_CONFIG */
|
||||
#endif /* BSP_USING_SPI0 */
|
||||
|
||||
#ifdef BSP_USING_SPI1
|
||||
#ifndef BSP_SPI1_SCK_PIN
|
||||
#define BSP_SPI1_SCK_PIN "PB13"
|
||||
#define BSP_SPI1_MISO_PIN "PB14"
|
||||
#define BSP_SPI1_MOSI_PIN "PB15"
|
||||
#define BSP_SPI1_AFIO "AF5"
|
||||
#endif /* BSP_SPI1_SCK_PIN */
|
||||
|
||||
#ifndef SPI1_BUS_CONFIG
|
||||
#define SPI1_BUS_CONFIG \
|
||||
{ \
|
||||
.spi_periph = SPI1, \
|
||||
.bus_name = "spi1", \
|
||||
.spi_clk = RCU_SPI1, \
|
||||
.spi_bus = &spi_bus1, \
|
||||
.sck_pin_name = BSP_SPI1_SCK_PIN, \
|
||||
.miso_pin_name = BSP_SPI1_MISO_PIN, \
|
||||
.mosi_pin_name = BSP_SPI1_MOSI_PIN, \
|
||||
.alternate = BSP_SPI1_AFIO, \
|
||||
IF_SPI_DMA(.spi_dma = &spi_dma[1]) \
|
||||
}
|
||||
#endif /* SPI1_BUS_CONFIG */
|
||||
#endif /* BSP_USING_SPI1 */
|
||||
|
||||
#ifdef BSP_USING_SPI2
|
||||
#ifndef BSP_SPI2_SCK_PIN
|
||||
#define BSP_SPI2_SCK_PIN "PB3"
|
||||
#define BSP_SPI2_MISO_PIN "PB4"
|
||||
#define BSP_SPI2_MOSI_PIN "PB5"
|
||||
#define BSP_SPI2_AFIO "AF6"
|
||||
#endif /* BSP_SPI1_SCK_PIN */
|
||||
|
||||
#ifndef SPI2_BUS_CONFIG
|
||||
#define SPI2_BUS_CONFIG \
|
||||
{ \
|
||||
.spi_periph = SPI2, \
|
||||
.bus_name = "spi2", \
|
||||
.spi_clk = RCU_SPI2, \
|
||||
.spi_bus = &spi_bus2, \
|
||||
.sck_pin_name = BSP_SPI2_SCK_PIN, \
|
||||
.miso_pin_name = BSP_SPI2_MISO_PIN, \
|
||||
.mosi_pin_name = BSP_SPI2_MOSI_PIN, \
|
||||
.alternate = BSP_SPI2_AFIO, \
|
||||
IF_SPI_DMA(.spi_dma = &spi_dma[2]) \
|
||||
}
|
||||
#endif /* SPI2_BUS_CONFIG */
|
||||
#endif /* BSP_USING_SPI2 */
|
||||
|
||||
#ifdef BSP_USING_SPI3
|
||||
#ifndef BSP_SPI3_SCK_PIN
|
||||
#define BSP_SPI3_SCK_PIN "PE12"
|
||||
#define BSP_SPI3_MISO_PIN "PE13"
|
||||
#define BSP_SPI3_MOSI_PIN "PE14"
|
||||
#define BSP_SPI3_AFIO "AF5"
|
||||
#endif /* BSP_SPI3_SCK_PIN */
|
||||
|
||||
#ifndef SPI3_BUS_CONFIG
|
||||
#define SPI3_BUS_CONFIG \
|
||||
{ \
|
||||
.spi_periph = SPI3, \
|
||||
.bus_name = "spi3", \
|
||||
.spi_clk = RCU_SPI3, \
|
||||
.spi_bus = &spi_bus3, \
|
||||
.sck_pin_name = BSP_SPI3_SCK_PIN, \
|
||||
.miso_pin_name = BSP_SPI3_MISO_PIN, \
|
||||
.mosi_pin_name = BSP_SPI3_MOSI_PIN, \
|
||||
.alternate = BSP_SPI3_AFIO, \
|
||||
IF_SPI_DMA(.spi_dma = &spi_dma[3]) \
|
||||
}
|
||||
#endif /* SPI3_BUS_CONFIG */
|
||||
#endif /* BSP_USING_SPI3 */
|
||||
|
||||
#ifdef BSP_USING_SPI4
|
||||
#ifndef BSP_SPI4_SCK_PIN
|
||||
#define BSP_SPI4_SCK_PIN "PF7"
|
||||
#define BSP_SPI4_MISO_PIN "PF8"
|
||||
#define BSP_SPI4_MOSI_PIN "PF9"
|
||||
#define BSP_SPI4_AFIO "AF5"
|
||||
#endif /* BSP_SPI4_SCK_PIN */
|
||||
|
||||
#ifndef SPI4_BUS_CONFIG
|
||||
#define SPI4_BUS_CONFIG \
|
||||
{ \
|
||||
.spi_periph = SPI4, \
|
||||
.bus_name = "spi4", \
|
||||
.spi_clk = RCU_SPI4, \
|
||||
.spi_bus = &spi_bus4, \
|
||||
.sck_pin_name = BSP_SPI4_SCK_PIN, \
|
||||
.miso_pin_name = BSP_SPI4_MISO_PIN, \
|
||||
.mosi_pin_name = BSP_SPI4_MOSI_PIN, \
|
||||
.alternate = BSP_SPI4_AFIO, \
|
||||
IF_SPI_DMA(.spi_dma = &spi_dma[4]) \
|
||||
}
|
||||
#endif /* SPI4_BUS_CONFIG */
|
||||
#endif /* BSP_USING_SPI4 */
|
||||
|
||||
#ifdef BSP_USING_SPI5
|
||||
#ifndef BSP_SPI5_SCK_PIN
|
||||
#define BSP_SPI5_SCK_PIN "PG13"
|
||||
#define BSP_SPI5_MISO_PIN "PG12"
|
||||
#define BSP_SPI5_MOSI_PIN "PG14"
|
||||
#define BSP_SPI5_AFIO "AF5"
|
||||
#endif /* BSP_SPI5_SCK_PIN */
|
||||
|
||||
#ifndef SPI5_BUS_CONFIG
|
||||
#define SPI5_BUS_CONFIG \
|
||||
{ \
|
||||
.spi_periph = SPI5, \
|
||||
.bus_name = "spi5", \
|
||||
.spi_clk = RCU_SPI5, \
|
||||
.spi_bus = &spi_bus5, \
|
||||
.sck_pin_name = BSP_SPI5_SCK_PIN, \
|
||||
.miso_pin_name = BSP_SPI5_MISO_PIN, \
|
||||
.mosi_pin_name = BSP_SPI5_MOSI_PIN, \
|
||||
.alternate = BSP_SPI5_AFIO, \
|
||||
IF_SPI_DMA(.spi_dma = &spi_dma[5]) \
|
||||
}
|
||||
#endif /* SPI5_BUS_CONFIG */
|
||||
#endif /* BSP_USING_SPI5 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__SPI_CONFIG_H__ */
|
||||
|
||||
@@ -0,0 +1,204 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2025, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-10-30 SummerGift first version
|
||||
* 2019-01-03 zylx modify dma support
|
||||
* 2025-10-09 WangShun compatible with RT-Studio
|
||||
*/
|
||||
|
||||
#ifndef __UART_CONFIG_H__
|
||||
#define __UART_CONFIG_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <board.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifndef BSP_UART0_AFIO
|
||||
#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx || defined SOC_SERIES_GD32H7xx || defined SOC_SERIES_GD32H75E
|
||||
#define BSP_UART0_AFIO "AF4"
|
||||
#elif defined SOC_SERIES_GD32E23x
|
||||
#define BSP_UART0_AFIO "AF1"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef BSP_UART1_AFIO
|
||||
#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx || defined SOC_SERIES_GD32H7xx || defined SOC_SERIES_GD32H75E
|
||||
#define BSP_UART1_AFIO "AF7"
|
||||
#elif defined SOC_SERIES_GD32E23x
|
||||
#define BSP_UART1_AFIO "AF1"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef BSP_UART2_AFIO
|
||||
#define BSP_UART2_AFIO "AF7"
|
||||
#endif
|
||||
|
||||
#ifndef BSP_UART3_AFIO
|
||||
#define BSP_UART3_AFIO "AF8"
|
||||
#endif
|
||||
|
||||
#ifndef BSP_UART4_AFIO
|
||||
#define BSP_UART4_AFIO "AF8"
|
||||
#endif
|
||||
|
||||
#ifndef BSP_UART5_AFIO
|
||||
#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx
|
||||
#define BSP_UART5_AFIO "AF8"
|
||||
#elif defined (SOC_SERIES_GD32H7xx) || defined(SOC_SERIES_GD32H75E)
|
||||
#define BSP_UART5_AFIO "AF7"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef BSP_UART6_AFIO
|
||||
#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx
|
||||
#define BSP_UART6_AFIO "AF8"
|
||||
#elif defined (SOC_SERIES_GD32H7xx) || defined(SOC_SERIES_GD32H75E)
|
||||
#define BSP_UART6_AFIO "AF7"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef BSP_UART7_AFIO
|
||||
#define BSP_UART7_AFIO "AF8"
|
||||
#endif
|
||||
|
||||
#if defined(BSP_USING_UART0)
|
||||
#ifndef UART0_CONFIG
|
||||
#define UART0_CONFIG \
|
||||
{ \
|
||||
.uart_periph = USART0, \
|
||||
.irqn = USART0_IRQn, \
|
||||
.per_clk = RCU_USART0, \
|
||||
.tx_pin_name = BSP_UART0_TX_PIN, \
|
||||
.rx_pin_name = BSP_UART0_RX_PIN, \
|
||||
.alternate = BSP_UART0_AFIO, \
|
||||
.serial = &serial0, \
|
||||
.device_name = "uart0", \
|
||||
}
|
||||
#endif /* UART0_CONFIG */
|
||||
#endif /* BSP_USING_UART0 */
|
||||
|
||||
#if defined(BSP_USING_UART1)
|
||||
#ifndef UART1_CONFIG
|
||||
#define UART1_CONFIG \
|
||||
{ \
|
||||
.uart_periph = USART1, \
|
||||
.irqn = USART1_IRQn, \
|
||||
.per_clk = RCU_USART1, \
|
||||
.tx_pin_name = BSP_UART1_TX_PIN, \
|
||||
.rx_pin_name = BSP_UART1_RX_PIN, \
|
||||
.alternate = BSP_UART1_AFIO, \
|
||||
.serial = &serial1, \
|
||||
.device_name = "uart1", \
|
||||
}
|
||||
#endif /* UART1_CONFIG */
|
||||
#endif /* BSP_USING_UART1 */
|
||||
|
||||
#if defined(BSP_USING_UART2)
|
||||
#ifndef UART2_CONFIG
|
||||
#define UART2_CONFIG \
|
||||
{ \
|
||||
.uart_periph = USART2, \
|
||||
.irqn = USART2_IRQn, \
|
||||
.per_clk = RCU_USART2, \
|
||||
.tx_pin_name = BSP_UART2_TX_PIN, \
|
||||
.rx_pin_name = BSP_UART2_RX_PIN, \
|
||||
.alternate = BSP_UART2_AFIO, \
|
||||
.serial = &serial2, \
|
||||
.device_name = "uart2", \
|
||||
}
|
||||
#endif /* UART2_CONFIG */
|
||||
#endif /* BSP_USING_UART2 */
|
||||
|
||||
#if defined(BSP_USING_UART3)
|
||||
#ifndef UART3_CONFIG
|
||||
#define UART3_CONFIG \
|
||||
{ \
|
||||
.uart_periph = UART3, \
|
||||
.irqn = UART3_IRQn, \
|
||||
.per_clk = RCU_UART3, \
|
||||
.tx_pin_name = BSP_UART3_TX_PIN, \
|
||||
.rx_pin_name = BSP_UART3_RX_PIN, \
|
||||
.alternate = BSP_UART3_AFIO, \
|
||||
.serial = &serial3, \
|
||||
.device_name = "uart3", \
|
||||
}
|
||||
#endif /* UART3_CONFIG */
|
||||
#endif /* BSP_USING_UART3 */
|
||||
|
||||
#if defined(BSP_USING_UART4)
|
||||
#ifndef UART4_CONFIG
|
||||
#define UART4_CONFIG \
|
||||
{ \
|
||||
.uart_periph = UART4, \
|
||||
.irqn = UART4_IRQn, \
|
||||
.per_clk = RCU_UART4, \
|
||||
.tx_pin_name = BSP_UART4_TX_PIN, \
|
||||
.rx_pin_name = BSP_UART4_RX_PIN, \
|
||||
.alternate = BSP_UART4_AFIO, \
|
||||
.serial = &serial4, \
|
||||
.device_name = "uart4", \
|
||||
}
|
||||
#endif /* UART4_CONFIG */
|
||||
#endif /* BSP_USING_UART4 */
|
||||
|
||||
#if defined(BSP_USING_UART5)
|
||||
#ifndef UART5_CONFIG
|
||||
#define UART5_CONFIG \
|
||||
{ \
|
||||
.uart_periph = USART5, \
|
||||
.irqn = USART5_IRQn, \
|
||||
.per_clk = RCU_USART5, \
|
||||
.tx_pin_name = BSP_UART5_TX_PIN, \
|
||||
.rx_pin_name = BSP_UART5_RX_PIN, \
|
||||
.alternate = BSP_UART5_AFIO, \
|
||||
.serial = &serial5, \
|
||||
.device_name = "uart5", \
|
||||
}
|
||||
#endif /* UART5_CONFIG */
|
||||
#endif /* BSP_USING_UART5 */
|
||||
|
||||
#if defined(BSP_USING_UART6)
|
||||
#ifndef UART6_CONFIG
|
||||
#define UART6_CONFIG \
|
||||
{ \
|
||||
.uart_periph = UART6, \
|
||||
.irqn = UART6_IRQn, \
|
||||
.per_clk = RCU_UART6, \
|
||||
.tx_pin_name = BSP_UART6_TX_PIN, \
|
||||
.rx_pin_name = BSP_UART6_RX_PIN, \
|
||||
.alternate = BSP_UART6_AFIO, \
|
||||
.serial = &serial6, \
|
||||
.device_name = "uart6", \
|
||||
}
|
||||
#endif /* UART6_CONFIG */
|
||||
#endif /* BSP_USING_UART6 */
|
||||
|
||||
#if defined(BSP_USING_UART7)
|
||||
#ifndef UART7_CONFIG
|
||||
#define UART7_CONFIG \
|
||||
{ \
|
||||
.uart_periph = UART7, \
|
||||
.irqn = UART7_IRQn, \
|
||||
.per_clk = RCU_UART7, \
|
||||
.tx_pin_name = BSP_UART7_TX_PIN, \
|
||||
.rx_pin_name = BSP_UART7_RX_PIN, \
|
||||
.alternate = BSP_UART7_AFIO, \
|
||||
.serial = &serial7, \
|
||||
.device_name = "uart7", \
|
||||
}
|
||||
#endif /* UART7_CONFIG */
|
||||
#endif /* BSP_USING_UART7 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __UART_CONFIG_H__ */
|
||||
|
||||
Reference in new issue
Block a user