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703 lines
18 KiB
703 lines
18 KiB
/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-11-07 RealThread the first version
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*/
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#include "drv_usbd_int.h"
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#include "drv_otghs_dev.h"
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#include <stdio.h>
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#if defined(BSP_USING_USB) && defined(RT_USING_USB_DEVICE)
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static const uint8_t USB_SPEED[4] = {
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[DSTAT_EM_HS_PHY_30MHZ_60MHZ] = (uint8_t)USB_SPEED_HIGH,
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[DSTAT_EM_FS_PHY_30MHZ_60MHZ] = (uint8_t)USB_SPEED_FULL,
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[DSTAT_EM_FS_PHY_48MHZ] = (uint8_t)USB_SPEED_FULL,
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[DSTAT_EM_LS_PHY_6MHZ] = (uint8_t)USB_SPEED_LOW
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};
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/* local function prototypes ('static') */
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static uint32_t usbd_int_epout(usb_core_driver *udev);
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static uint32_t usbd_int_epin(usb_core_driver *udev);
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static uint32_t usbd_int_rxfifo(usb_core_driver *udev);
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static uint32_t usbd_int_reset(usb_core_driver *udev);
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static uint32_t usbd_int_enumfinish(usb_core_driver *udev);
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static uint32_t usbd_int_suspend(usb_core_driver *udev);
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static uint32_t usbd_int_wakeup(usb_core_driver *udev);
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#if (1U == LPM_ENABLED)
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static uint32_t usbd_int_lpm(usb_core_driver *udev, usb_lpm_type active_type);
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#endif /* LPM_ENABLED */
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static uint32_t usbd_emptytxfifo_write(usb_core_driver *udev, uint32_t ep_num);
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/*!
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\brief USB device-mode interrupts global service routine handler
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\param[in] udev: pointer to USB device instance
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\param[out] none
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\retval none
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*/
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void usbd_isr(usb_core_driver *udev)
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{
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if (HOST_MODE != (udev->regs.gr->GINTF & GINTF_COPM))
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{
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uint32_t intr = udev->regs.gr->GINTF;
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intr &= udev->regs.gr->GINTEN;
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/* there are no interrupts, avoid spurious interrupt */
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if (!intr)
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{
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return;
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}
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/* OUT endpoints interrupts */
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if (intr & GINTF_OEPIF)
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{
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(void)usbd_int_epout(udev);
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}
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/* IN endpoints interrupts */
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if (intr & GINTF_IEPIF)
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{
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(void)usbd_int_epin(udev);
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}
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/* suspend interrupt */
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if (intr & GINTF_SP)
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{
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(void)usbd_int_suspend(udev);
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}
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/* wakeup interrupt */
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if (intr & GINTF_WKUPIF)
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{
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(void)usbd_int_wakeup(udev);
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}
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/* start of frame interrupt */
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if (intr & GINTF_SOF)
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{
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/* clear interrupt */
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udev->regs.gr->GINTF = GINTF_SOF;
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}
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/* receive FIFO not empty interrupt */
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if (intr & GINTF_RXFNEIF)
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{
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(void)usbd_int_rxfifo(udev);
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}
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/* USB reset interrupt */
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if (intr & GINTF_RST)
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{
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(void)usbd_int_reset(udev);
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}
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/* enumeration has been done interrupt */
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if (intr & GINTF_ENUMFIF)
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{
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(void)usbd_int_enumfinish(udev);
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}
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/* incomplete synchronization IN transfer interrupt*/
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if (intr & GINTF_ISOINCIF)
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{
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if (NULL != udev->dev.class_core->incomplete_isoc_in)
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{
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(void)udev->dev.class_core->incomplete_isoc_in(udev);
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}
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/* clear interrupt */
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udev->regs.gr->GINTF = GINTF_ISOINCIF;
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}
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/* incomplete synchronization OUT transfer interrupt*/
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if (intr & GINTF_ISOONCIF)
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{
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if (NULL != udev->dev.class_core->incomplete_isoc_out)
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{
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(void)udev->dev.class_core->incomplete_isoc_out(udev);
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}
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/* clear interrupt */
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udev->regs.gr->GINTF = GINTF_ISOONCIF;
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}
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#if (1U == LPM_ENABLED)
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if (intr & GINTF_LPMIF)
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{
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/* clear interrupt */
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udev->regs.gr->GINTF = GINTF_LPMIF;
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udev->dev.pm.BESL = (udev->regs.gr->GLPMCFG & GLPMCFG_BESL) >> 2U;
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udev->dev.pm.dev_remote_wakeup = (udev->regs.gr->GLPMCFG & GLPMCFG_REW) >> 6U;
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if (LPM_L0 == udev->dev.pm.lpm_state)
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{
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udev->dev.pm.lpm_state = LPM_L1;
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usbd_int_lpm(udev, LPM_L1_ACTIVE);
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}
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else
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{
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udev->dev.pm.lpm_state = LPM_L0;
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usbd_int_lpm(udev, LPM_L0_ACTIVE);
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}
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}
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#endif /* LPM_ENABLED */
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#ifdef VBUS_SENSING_ENABLED
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/* session request interrupt */
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if (intr & GINTF_SESIF)
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{
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udev->regs.gr->GINTF = GINTF_SESIF;
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}
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/* OTG mode interrupt */
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if (intr & GINTF_OTGIF)
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{
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if (udev->regs.gr->GOTGINTF & GOTGINTF_SESEND)
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{
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}
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/* clear OTG interrupt */
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udev->regs.gr->GINTF = GINTF_OTGIF;
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}
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#endif /* VBUS_SENSING_ENABLED */
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}
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}
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/*!
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\brief indicates that an OUT endpoint has a pending interrupt
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\param[in] udev: pointer to USB device instance
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\param[out] none
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\retval operation status
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*/
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static uint32_t usbd_int_epout(usb_core_driver *udev)
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{
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uint32_t epintnum = 0U;
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uint8_t ep_num = 0U;
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for (epintnum = usb_oepintnum_read(udev); epintnum; epintnum >>= 1)
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{
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if (epintnum & 0x01U)
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{
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__IO uint32_t oepintr = usb_oepintr_read(udev, ep_num);
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/* transfer complete interrupt */
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if (oepintr & DOEPINTF_TF)
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{
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/* clear the bit in DOEPINTF for this interrupt */
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udev->regs.er_out[ep_num]->DOEPINTF = DOEPINTF_TF;
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if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode)
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{
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__IO uint32_t eplen = udev->regs.er_out[ep_num]->DOEPLEN;
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udev->dev.transc_out[ep_num].xfer_count = udev->dev.transc_out[ep_num].max_len -
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(eplen & DEPLEN_TLEN);
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}
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/* inform upper layer: data ready */
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usbd_data_out_stage_callback(ep_num, udev->dev.transc_out[ep_num].xfer_len);
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if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode)
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{
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if ((0U == ep_num) && ((uint8_t)USB_CTL_STATUS_OUT == udev->dev.control.ctl_state))
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{
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usb_ctlep_startout(udev);
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}
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}
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}
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/* SETUP phase finished interrupt (control endpoints) */
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if (oepintr & DOEPINTF_STPF)
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{
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/* inform the upper layer that a SETUP packet is available */
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usbd_setup_stage_callback((struct urequest *)&udev->dev.control.req);
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udev->regs.er_out[ep_num]->DOEPINTF = DOEPINTF_STPF;
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}
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}
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ep_num++;
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}
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return 1U;
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}
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/*!
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\brief indicates that an IN endpoint has a pending interrupt
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\param[in] udev: pointer to USB device instance
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\param[out] none
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\retval operation status
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*/
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static uint32_t usbd_int_epin(usb_core_driver *udev)
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{
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uint32_t epintnum = 0U;
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uint8_t ep_num = 0U;
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for (epintnum = usb_iepintnum_read(udev); epintnum; epintnum >>= 1)
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{
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if (epintnum & 0x1U)
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{
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__IO uint32_t iepintr = usb_iepintr_read(udev, ep_num);
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if (iepintr & DIEPINTF_TF)
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{
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udev->regs.er_in[ep_num]->DIEPINTF = DIEPINTF_TF;
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/* data transmission is completed */
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usbd_data_in_stage_callback(ep_num, udev->dev.transc_in[ep_num].xfer_len);
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if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode)
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{
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if ((0U == ep_num) && ((uint8_t)USB_CTL_STATUS_IN == udev->dev.control.ctl_state))
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{
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usb_ctlep_startout(udev);
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}
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}
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}
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if (iepintr & DIEPINTF_TXFE)
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{
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usbd_emptytxfifo_write(udev, (uint32_t)ep_num);
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udev->regs.er_in[ep_num]->DIEPINTF = DIEPINTF_TXFE;
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}
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}
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ep_num++;
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}
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return 1U;
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}
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/*!
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\brief handle the RX status queue level interrupt
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\param[in] udev: pointer to USB device instance
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\param[out] none
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\retval operation status
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*/
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static uint32_t usbd_int_rxfifo(usb_core_driver *udev)
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{
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usb_transc *transc = NULL;
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uint8_t data_PID = 0U;
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uint32_t bcount = 0U;
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__IO uint32_t devrxstat = 0U;
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/* disable the RX status queue non-empty interrupt */
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udev->regs.gr->GINTEN &= ~GINTEN_RXFNEIE;
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/* get the status from the top of the FIFO */
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devrxstat = udev->regs.gr->GRSTATP;
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uint8_t ep_num = (uint8_t)(devrxstat & GRSTATRP_EPNUM);
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transc = &udev->dev.transc_out[ep_num];
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bcount = (devrxstat & GRSTATRP_BCOUNT) >> 4;
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data_PID = (uint8_t)((devrxstat & GRSTATRP_DPID) >> 15);
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switch ((devrxstat & GRSTATRP_RPCKST) >> 17)
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{
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case RSTAT_GOUT_NAK:
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break;
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case RSTAT_DATA_UPDT:
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if (bcount > 0U)
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{
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(void)usb_rxfifo_read(&udev->regs, transc->xfer_buf, (uint16_t)bcount);
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transc->xfer_buf += bcount;
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transc->xfer_count += bcount;
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}
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break;
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case RSTAT_XFER_COMP:
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/* trigger the OUT endpoint interrupt */
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break;
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case RSTAT_SETUP_COMP:
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/* trigger the OUT endpoint interrupt */
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break;
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case RSTAT_SETUP_UPDT:
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if ((0U == transc->ep_addr.num) && (8U == bcount) && (DPID_DATA0 == data_PID))
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{
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/* copy the SETUP packet received in FIFO into the setup buffer in RAM */
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(void)usb_rxfifo_read(&udev->regs, (uint8_t *)&udev->dev.control.req, (uint16_t)bcount);
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transc->xfer_count += bcount;
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}
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break;
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default:
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break;
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}
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/* enable the RX status queue level interrupt */
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udev->regs.gr->GINTEN |= GINTEN_RXFNEIE;
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return 1U;
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}
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/*!
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\brief handle USB reset interrupt
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\param[in] udev: pointer to USB device instance
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\param[out] none
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\retval status
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*/
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static uint32_t usbd_int_reset(usb_core_driver *udev)
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{
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uint32_t i;
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/* clear the remote wakeup signaling */
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udev->regs.dr->DCTL &= ~DCTL_RWKUP;
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/* flush the TX FIFO */
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(void)usb_txfifo_flush(&udev->regs, 0U);
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for (i = 0U; i < udev->bp.num_ep; i++)
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{
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udev->regs.er_in[i]->DIEPINTF = 0xFFU;
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udev->regs.er_out[i]->DOEPINTF = 0xFFU;
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}
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/* clear all pending device endpoint interrupts */
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udev->regs.dr->DAEPINT = 0xFFFFFFFFU;
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/* enable endpoint 0 interrupts */
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udev->regs.dr->DAEPINTEN = 1U | (1U << 16U);
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/* enable OUT endpoint interrupts */
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udev->regs.dr->DOEPINTEN = DOEPINTEN_STPFEN | DOEPINTEN_TFEN;
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#ifdef USB_DEDICATED_EP1_ENABLED
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udev->regs.dr->DOEP1INTEN = DOEPINTEN_STPFEN | DOEPINTEN_TFEN;
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#endif
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/* enable IN endpoint interrupts */
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udev->regs.dr->DIEPINTEN = DIEPINTEN_TFEN;
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#ifdef USB_DEDICATED_EP1_ENABLED
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udev->regs.dr->DIEP1INTEN = DIEPINTEN_TFEN;
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#endif
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/* reset device address */
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udev->regs.dr->DCFG &= ~DCFG_DAR;
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/* configure endpoint 0 to receive SETUP packets */
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usb_ctlep_startout(udev);
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/* clear USB reset interrupt */
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udev->regs.gr->GINTF = GINTF_RST;
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usb_ep_active(udev, 0x00, USB_FS_EP0_MAX_LEN, USB_EPTYPE_CTRL);
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usb_ep_active(udev, 0x80, USB_FS_EP0_MAX_LEN, USB_EPTYPE_CTRL);
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usbd_reset_callback();
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return 1U;
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}
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/*!
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\brief handle USB speed enumeration finish interrupt
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\param[in] udev: pointer to USB device instance
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\param[out] none
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\retval status
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*/
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static uint32_t usbd_int_enumfinish(usb_core_driver *udev)
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{
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uint8_t enum_speed = (uint8_t)((udev->regs.dr->DSTAT & DSTAT_ES) >> 1);
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udev->regs.dr->DCTL &= ~DCTL_CGINAK;
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udev->regs.dr->DCTL |= DCTL_CGINAK;
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udev->regs.gr->GUSBCS &= ~GUSBCS_UTT;
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/* set USB turn-around time based on device speed and PHY interface */
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if ((uint8_t)USB_SPEED_HIGH == USB_SPEED[enum_speed])
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{
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udev->bp.core_speed = (uint8_t)USB_SPEED_HIGH;
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udev->regs.gr->GUSBCS |= 0x09U << 10;
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}
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else
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{
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udev->bp.core_speed = (uint8_t)USB_SPEED_FULL;
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udev->regs.gr->GUSBCS |= 0x05U << 10;
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}
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/* clear interrupt */
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udev->regs.gr->GINTF = GINTF_ENUMFIF;
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return 1U;
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}
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/*!
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\brief USB suspend interrupt handler
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\param[in] udev: pointer to USB device instance
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\param[out] none
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\retval operation status
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*/
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static uint32_t usbd_int_suspend(usb_core_driver *udev)
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{
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__IO uint8_t low_power = udev->bp.low_power;
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__IO uint8_t suspend = (uint8_t)(udev->regs.dr->DSTAT & DSTAT_SPST);
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udev->dev.backup_status = udev->dev.cur_status;
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if (low_power && suspend)
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{
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/* switch-off the USB clocks */
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*udev->regs.PWRCLKCTL |= PWRCLKCTL_SUCLK | PWRCLKCTL_SHCLK;
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/* enter DEEP_SLEEP mode with LDO in low power mode */
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pmu_to_deepsleepmode(WFI_CMD);
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}
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/* clear interrupt */
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udev->regs.gr->GINTF = GINTF_SP;
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return 1U;
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}
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/*!
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\brief USB wakeup interrupt handler
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\param[in] udev: pointer to USB device instance
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\param[out] none
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\retval operation status
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*/
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static uint32_t usbd_int_wakeup(usb_core_driver *udev)
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{
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__IO uint8_t low_power = udev->bp.low_power;
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__IO uint8_t remote_wakeup = udev->dev.pm.dev_remote_wakeup;
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#if (1U == LPM_ENABLED)
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if (LPM_L1 == udev->dev.pm.lpm_state)
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{
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udev->dev.pm.lpm_state = LPM_L0;
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usbd_int_lpm(udev, LPM_L0_ACTIVE);
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}
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else
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#endif /* LPM_ENABLED */
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{
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if (remote_wakeup && low_power)
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{
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/* resume MCU CLK */
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/* reset SLEEPDEEP bit of Cortex-M33 system control register */
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SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
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}
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usb_clock_active(udev);
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/* inform upper layer by the resume event */
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udev->dev.cur_status = udev->dev.backup_status;
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}
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/* clear interrupt */
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udev->regs.gr->GINTF = GINTF_WKUPIF;
|
|
|
|
return 1U;
|
|
}
|
|
|
|
#ifdef USB_DEDICATED_EP1_ENABLED
|
|
|
|
/*!
|
|
\brief USB dedicated OUT endpoint 1 interrupt service routine handler
|
|
\param[in] udev: pointer to USB device instance
|
|
\param[out] none
|
|
\retval operation status
|
|
*/
|
|
uint32_t usbd_int_dedicated_ep1out(usb_core_driver *udev)
|
|
{
|
|
uint32_t oepintr = 0U;
|
|
uint32_t oeplen = 0U;
|
|
|
|
oepintr = udev->regs.er_out[1]->DOEPINTF;
|
|
oepintr &= udev->regs.dr->DOEP1INTEN;
|
|
|
|
/* transfer complete */
|
|
if (oepintr & DOEPINTF_TF)
|
|
{
|
|
/* clear the bit in DOEPINTn for this interrupt */
|
|
udev->regs.er_out[1]->DOEPINTF = DOEPINTF_TF;
|
|
|
|
if (USB_USE_DMA == udev->bp.transfer_mode)
|
|
{
|
|
oeplen = udev->regs.er_out[1]->DOEPLEN;
|
|
|
|
/* ToDo : handle more than one single MPS size packet */
|
|
udev->dev.transc_out[1].xfer_count = udev->dev.transc_out[1].max_len -
|
|
(oeplen & DEPLEN_TLEN);
|
|
}
|
|
|
|
/* RX COMPLETE */
|
|
usbd_out_transc(udev, 1U);
|
|
}
|
|
|
|
return 1U;
|
|
}
|
|
|
|
/*!
|
|
\brief USB dedicated IN endpoint 1 interrupt service routine handler
|
|
\param[in] udev: pointer to USB device instance
|
|
\param[out] none
|
|
\retval operation status
|
|
*/
|
|
uint32_t usbd_int_dedicated_ep1in(usb_core_driver *udev)
|
|
{
|
|
uint32_t inten, intr, emptyen;
|
|
|
|
inten = udev->regs.dr->DIEP1INTEN;
|
|
emptyen = udev->regs.dr->DIEPFEINTEN;
|
|
|
|
inten |= ((emptyen >> 1U) & 0x1U) << 7U;
|
|
|
|
intr = udev->regs.er_in[1]->DIEPINTF & inten;
|
|
|
|
if (intr & DIEPINTF_TF)
|
|
{
|
|
udev->regs.dr->DIEPFEINTEN &= ~(0x1U << 1U);
|
|
|
|
udev->regs.er_in[1]->DIEPINTF = DIEPINTF_TF;
|
|
|
|
/* TX COMPLETE */
|
|
usbd_in_transc(udev, 1U);
|
|
}
|
|
|
|
if (intr & DIEPINTF_TXFE)
|
|
{
|
|
usbd_emptytxfifo_write(udev, 1U);
|
|
|
|
udev->regs.er_in[1]->DIEPINTF = DIEPINTF_TXFE;
|
|
}
|
|
|
|
return 1U;
|
|
}
|
|
|
|
#endif
|
|
|
|
#if (1U == LPM_ENABLED)
|
|
|
|
/*!
|
|
\brief USB LPM interrupt handler
|
|
\param[in] udev: pointer to USB device instance
|
|
\param[in] active_type: active type
|
|
only one parameter can be selected which is shown as below:
|
|
\arg LPM_L0_ACTIVE: select L0 to active
|
|
\arg LPM_L1_ACTIVE: select L1 to active
|
|
\param[out] none
|
|
\retval operation status
|
|
*/
|
|
static uint32_t usbd_int_lpm(usb_core_driver *udev, usb_lpm_type active_type)
|
|
{
|
|
__IO uint8_t low_power = udev->bp.low_power;
|
|
__IO uint8_t suspend = (uint8_t)(udev->regs.dr->DSTAT & DSTAT_SPST);
|
|
__IO uint8_t is_configured = (udev->dev.cur_status == (uint8_t)USBD_CONFIGURED) ? 1U : 0U;
|
|
|
|
switch (active_type)
|
|
{
|
|
case LPM_L0_ACTIVE:
|
|
udev->dev.cur_status = udev->dev.backup_status;
|
|
|
|
/* switch-on the OTG clocks */
|
|
usb_clock_active(udev);
|
|
|
|
if (low_power)
|
|
{
|
|
/* resume MCU CLK */
|
|
|
|
/* reset SLEEPDEEP bit of Cortex-M7 system control register */
|
|
SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
|
|
}
|
|
break;
|
|
|
|
case LPM_L1_ACTIVE:
|
|
udev->dev.backup_status = udev->dev.cur_status;
|
|
udev->dev.cur_status = (uint8_t)USBD_SUSPENDED;
|
|
|
|
/* add delay */
|
|
usb_mdelay(300U);
|
|
|
|
/* switch-off the OTG clocks */
|
|
*udev->regs.PWRCLKCTL |= PWRCLKCTL_SUCLK | PWRCLKCTL_SHCLK;
|
|
|
|
if (low_power)
|
|
{
|
|
/* enter DEEP_SLEEP mode with LDO in low power mode */
|
|
pmu_to_deepsleepmode(WFI_CMD);
|
|
}
|
|
break;
|
|
}
|
|
|
|
return 1U;
|
|
}
|
|
|
|
#endif /* LPM_ENABLED */
|
|
|
|
/*!
|
|
\brief check FIFO for the next packet to be loaded
|
|
\param[in] udev: pointer to USB device instance
|
|
\param[in] ep_num: endpoint identifier which is in (0..5)
|
|
\param[out] none
|
|
\retval status
|
|
*/
|
|
static uint32_t usbd_emptytxfifo_write(usb_core_driver *udev, uint32_t ep_num)
|
|
{
|
|
uint32_t len;
|
|
uint32_t word_count;
|
|
|
|
usb_transc *transc = &udev->dev.transc_in[ep_num];
|
|
|
|
len = transc->xfer_len - transc->xfer_count;
|
|
|
|
/* get the data length to write */
|
|
if (len > transc->max_len)
|
|
{
|
|
len = transc->max_len;
|
|
}
|
|
|
|
word_count = (len + 3U) / 4U;
|
|
|
|
while (((udev->regs.er_in[ep_num]->DIEPTFSTAT & DIEPTFSTAT_IEPTFS) >= word_count) &&
|
|
(transc->xfer_count < transc->xfer_len))
|
|
{
|
|
len = transc->xfer_len - transc->xfer_count;
|
|
|
|
if (len > transc->max_len)
|
|
{
|
|
len = transc->max_len;
|
|
}
|
|
|
|
/* write FIFO in word(4bytes) */
|
|
word_count = (len + 3U) / 4U;
|
|
|
|
/* write the FIFO */
|
|
(void)usb_txfifo_write(&udev->regs, transc->xfer_buf, (uint8_t)ep_num, (uint16_t)len);
|
|
|
|
transc->xfer_buf += len;
|
|
transc->xfer_count += len;
|
|
|
|
if (transc->xfer_count == transc->xfer_len)
|
|
{
|
|
/* disable the device endpoint FIFO empty interrupt */
|
|
udev->regs.dr->DIEPFEINTEN &= ~(0x01U << ep_num);
|
|
}
|
|
}
|
|
|
|
return 1U;
|
|
}
|
|
|
|
#endif /* BSP_USING_USB && RT_USING_USB_DEVICE */
|
|
|