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282 lines
18 KiB
282 lines
18 KiB
/*!
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\file gd32h75e_fac.c
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\brief definitions for the FAC
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\version 2025-08-07, V1.2.0, firmware for GD32H75E
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*/
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/*
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Copyright (c) 2025, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#ifndef GD32H75E_FAC_H
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#define GD32H75E_FAC_H
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#include "gd32h75e.h"
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/* FAC definitions */
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#define FAC FAC_BASE /*!< FAC base address */
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#define REG16_INT(addr) (*(volatile int16_t *)(uint32_t)(addr))
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#define REG32_FLOAT(addr) (*(volatile float *)(uint32_t)(addr))
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/* registers definitions */
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#define FAC_X0BCFG REG32((FAC) + 0x00000000U) /*!< FAC X0 buffer configure register */
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#define FAC_X1BCFG REG32((FAC) + 0x00000004U) /*!< FAC X1 buffer configure register */
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#define FAC_YBCFG REG32((FAC) + 0x00000008U) /*!< FAC Y buffer configure register */
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#define FAC_PARACFG REG32((FAC) + 0x0000000CU) /*!< FAC Parameter configure register */
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#define FAC_CTL REG32((FAC) + 0x00000010U) /*!< FAC Control register */
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#define FAC_STAT REG32((FAC) + 0x00000014U) /*!< FAC Status register */
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#define FAC_WDATA REG32((FAC) + 0x00000018U) /*!< FAC write data register */
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#define FAC_RDATA REG32((FAC) + 0x0000001CU) /*!< FAC read data register */
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#define FAC_WDATA_INT REG16_INT((FAC) + 0x00000018U) /*!< FAC write data register */
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#define FAC_WDATA_FLOAT REG32_FLOAT((FAC) + 0x00000018U)/*!< FAC write data register */
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#define FAC_RDATA_INT REG16_INT((FAC) + 0x0000001CU) /*!< FAC read data register */
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#define FAC_RDATA_FLOAT REG32_FLOAT((FAC) + 0x0000001CU)/*!< FAC read data register */
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/* bits definitions */
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/* FAC_X0BCFG */
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#define FAC_X0BCFG_X0B_ADDR BITS(0,7) /*!< X0 buffer base address */
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#define FAC_X0BCFG_X0B_SIZE BITS(8,15) /*!< X0 buffer allocated size */
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#define FAC_X0BCFG_X0_WBFF BITS(24,25) /*!< watermark for buffer full flag */
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/* FAC_X1BCFG */
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#define FAC_X1BCFG_X1B_ADDR BITS(0,7) /*!< X1 buffer base address */
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#define FAC_X1BCFG_X1B_SIZE BITS(8,15) /*!< X1 buffer allocated size */
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/* FAC_YBCFG */
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#define FAC_YBCFG_YB_ADDR BITS(0,7) /*!< Y buffer base address */
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#define FAC_YBCFG_YB_SIZE BITS(8,15) /*!< Y buffer allocated size */
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#define FAC_YBCFG_Y_WBEF BITS(24,25) /*!< watermark for buffer empty flag */
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/* FAC_PARACFG */
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#define FAC_PARACFG_IPP BITS(0,7) /*!< input parameter IPP */
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#define FAC_PARACFG_IPQ BITS(8,15) /*!< input parameter IPQ */
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#define FAC_PARACFG_IPR BITS(16,23) /*!< input parameter IPR */
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#define FAC_PARACFG_FUN BITS(24,30) /*!< function */
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#define FAC_PARACFG_EXE BIT(31) /*!< execution */
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/* FAC_CTL */
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#define FAC_CTL_RIE BIT(0) /*!< read interrupt enable */
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#define FAC_CTL_WIE BIT(1) /*!< write interrupt enable */
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#define FAC_CTL_OFEIE BIT(2) /*!< overflow error interrupt enable */
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#define FAC_CTL_UFEIE BIT(3) /*!< underflow error interrupt enable */
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#define FAC_CTL_STEIE BIT(4) /*!< saturation error interrupt enable */
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#define FAC_CTL_GSTEIE BIT(5) /*!< gain saturation error interrupt enable */
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#define FAC_CTL_DREN BIT(8) /*!< DMA read channel enable */
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#define FAC_CTL_DWEN BIT(9) /*!< DMA write channel enable */
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#define FAC_CTL_FLTEN BIT(14) /*!< floating point format enable */
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#define FAC_CTL_CPEN BIT(15) /*!< clipping enable */
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#define FAC_CTL_RST BIT(16) /*!< reset FAC unit */
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/* FAC_STAT */
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#define FAC_STAT_YBEF BIT(0) /*!< Y buffer empty flag */
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#define FAC_STAT_X0BFF BIT(1) /*!< X0 buffer full flag */
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#define FAC_STAT_OFEF BIT(8) /*!< overflow error flag */
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#define FAC_STAT_UFEF BIT(9) /*!< underflow error flag */
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#define FAC_STAT_STEF BIT(10) /*!< saturation error flag */
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#define FAC_STAT_GSTEF BIT(11) /*!< gain saturation error flag */
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/* FAC_WDATA */
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#define FAC_WDATA_WDATA BITS(0,15) /*!< Write data */
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/* FAC_RDATA */
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#define FAC_RDATA_RDATA BITS(0,15) /*!< Read data */
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/* constants definitions */
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/* structure for fac filter parameters */
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typedef struct
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{
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uint8_t input_addr; /*!< base address of the input buffer (X0) */
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uint8_t input_size; /*!< size of input buffer */
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uint8_t coeff_addr; /*!< base address of the coefficient buffer (X1) */
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uint8_t coeff_size; /*!< size of coefficient buffer */
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uint8_t output_addr; /*!< base address of the output buffer (Y) */
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uint8_t output_size; /*!< size of output buffer */
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uint8_t ipp; /*!< value P (vector length, number of filter taps, etc.) */
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uint8_t ipq; /*!< value Q (vector length, etc.) */
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uint8_t ipr; /*!< value R (gain, etc.) */
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uint32_t input_threshold; /*!< threshold of input buffer full */
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uint32_t output_threshold; /*!< threshold of output buffer empty */
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uint32_t clip; /*!< enable or disable the clipping feature */
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uint32_t func; /*!< FAC functions select */
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}fac_parameter_struct;
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/* structure for fac fixed data preload parameters */
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typedef struct
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{
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uint8_t coeffa_size; /*!< size of the coefficient vector A */
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int16_t *coeffa_ctx; /*!< [IIR only] content of the coefficient vector A */
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uint8_t coeffb_size; /*!< size of the coefficient vector B */
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int16_t *coeffb_ctx; /*!< content of the coefficient vector B */
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uint8_t input_size; /*!< Size of the input data */
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int16_t *input_ctx; /*!< content of the input data */
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uint8_t output_size; /*!< size of the output data */
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int16_t *output_ctx; /*!< content of the output data */
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}fac_fixed_data_preload_struct;
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/* structure for fac float data preload parameters */
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typedef struct
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{
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uint8_t coeffa_size; /*!< size of the coefficient vector A */
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float *coeffa_ctx; /*!< [IIR only] content of the coefficient vector A */
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uint8_t coeffb_size; /*!< size of the coefficient vector B */
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float *coeffb_ctx; /*!< content of the coefficient vector B */
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uint8_t input_size; /*!< size of the input data */
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float *input_ctx; /*!< content of the input data */
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uint8_t output_size; /*!< size of the output data */
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float *output_ctx; /*!< content of the output data */
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}fac_float_data_preload_struct;
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/* FAC function select definitions */
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#define PARACFG_FUN(regval) (FAC_PARACFG_FUN & ((uint32_t)(regval) << 24))
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#define FUNC_LOAD_X0 PARACFG_FUN(1) /*!< load_X0_buffer */
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#define FUNC_LOAD_X1 PARACFG_FUN(2) /*!< load_X1_buffer */
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#define FUNC_LOAD_Y PARACFG_FUN(3) /*!< load_Y_buffer */
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#define FUNC_CONVO_FIR PARACFG_FUN(8) /*!< convolution (FIR filter) */
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#define FUNC_IIR_DIRECT_FORM_1 PARACFG_FUN(9) /*!< IIR filter (direct form 1) */
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/* FAC watermark setting definitions */
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#define X0BCFG_X0_WBFF(regval) (FAC_X0BCFG_X0_WBFF & ((uint32_t)(regval) << 24))
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#define FAC_THRESHOLD_1 X0BCFG_X0_WBFF(0) /*!< full/empty flag when buffer less than 1 */
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#define FAC_THRESHOLD_2 X0BCFG_X0_WBFF(1) /*!< full/empty flag when buffer less than 2 */
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#define FAC_THRESHOLD_4 X0BCFG_X0_WBFF(2) /*!< full/empty flag when buffer less than 4 */
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#define FAC_THRESHOLD_8 X0BCFG_X0_WBFF(3) /*!< full/empty flag when buffer less than 8 */
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/* FAC clip function definitions */
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#define FAC_CP_DISABLE ((uint8_t)0x00U) /*!< clipping disabled */
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#define FAC_CP_ENABLE ((uint8_t)0x01U) /*!< clipping enabled */
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/* FAC function execution definitions */
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#define PARACFG_EXE(regval) (FAC_PARACFG_EXE & ((uint32_t)(regval) << 31))
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#define FAC_FUNC_START PARACFG_EXE(0) /*!< start execution function */
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#define FAC_FUNC_STOP PARACFG_EXE(1) /*!< stop execution function */
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/* FAC DMA mdoe definitions */
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#define FAC_DMA_READ FAC_CTL_DREN /*!< enable dma read */
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#define FAC_DMA_WRITE FAC_CTL_DWEN /*!< enable dma write */
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/* FAC interrupt flag definitions */
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#define FAC_INT_FLAG_YBEF ((uint8_t)0x00U) /*!< Y buffer empty interrupt flag */
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#define FAC_INT_FLAG_X0BFF ((uint8_t)0x01U) /*!< X0 buffer full interrupt flag */
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#define FAC_INT_FLAG_OFEF ((uint8_t)0x02U) /*!< Overflow error interrupt flag */
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#define FAC_INT_FLAG_UFEF ((uint8_t)0x03U) /*!< underflow error interrupt flag */
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#define FAC_INT_FLAG_STEF ((uint8_t)0x04U) /*!< saturation error interrupt flag */
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#define FAC_INT_FLAG_GSTEF ((uint8_t)0x05U) /*!< gain saturation error interrupt flag */
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/* FAC flag definitions */
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#define FAC_FLAG_YBEF FAC_STAT_YBEF /*!< Y buffer empty flag */
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#define FAC_FLAG_X0BFF FAC_STAT_X0BFF /*!< X0 buffer full flag */
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#define FAC_FLAG_OFEF FAC_STAT_OFEF /*!< overflow error flag */
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#define FAC_FLAG_UFEF FAC_STAT_UFEF /*!< underflow error flag */
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#define FAC_FLAG_STEF FAC_STAT_STEF /*!< saturation error flag */
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#define FAC_FLAG_GSTEF FAC_STAT_GSTEF /*!< gain saturation error flag */
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#define NOT_FAC_THRESHOLD(input_threshold) (((input_threshold) != FAC_THRESHOLD_1) && ((input_threshold) != FAC_THRESHOLD_2) && \
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((input_threshold) != FAC_THRESHOLD_4) && ((input_threshold) != FAC_THRESHOLD_8))
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#define NOT_FAC_CPMODE(cpmod) (((cpmod) != FAC_CP_ENABLE) && ((cpmod) != FAC_CP_DISABLE))
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#define NOT_FAC_DMA_REQ(dma_req) (((dma_req) != FAC_DMA_READ) && ((dma_req) != FAC_DMA_WRITE))
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#define NOT_FAC_FUNC(func) (((func) != FUNC_CONVO_FIR) && ((func) != FUNC_IIR_DIRECT_FORM_1))
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#define NOT_FAC_INTERRUPT(interrupt) (((interrupt) != FAC_CTL_RIE) && ((interrupt) != FAC_CTL_WIE) && \
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((interrupt) != FAC_CTL_OFEIE) && ((interrupt) != FAC_CTL_UFEIE) && \
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((interrupt) != FAC_CTL_STEIE) && ((interrupt) != FAC_CTL_GSTEIE))
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#define NOT_FAC_INTERRUPT_FLAG(interrupt) (((interrupt) != FAC_INT_FLAG_YBEF) && ((interrupt) != FAC_INT_FLAG_X0BFF) && \
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((interrupt) != FAC_INT_FLAG_OFEF) && ((interrupt) != FAC_INT_FLAG_UFEF) && \
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((interrupt) != FAC_INT_FLAG_STEF) && ((interrupt) != FAC_INT_FLAG_GSTEF))
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#define NOT_FAC_FLAG(flag) (((flag) != FAC_FLAG_YBEF) && ((flag) != FAC_FLAG_X0BFF) && \
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((flag) != FAC_FLAG_OFEF) && ((flag) != FAC_FLAG_UFEF) && \
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((flag) != FAC_FLAG_STEF) && ((flag) != FAC_FLAG_GSTEF))
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/* FAC function declarations */
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/* initialization functions */
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/* reset the FAC peripheral */
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void fac_deinit(void);
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/* initialize the FAC filter parameter struct with the default values */
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void fac_struct_para_init(fac_parameter_struct* fac_parameter);
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/* initialize the FAC fixed data preload parameter struct with the default values */
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void fac_fixed_data_preload_init(fac_fixed_data_preload_struct *init_struct);
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/* initialize the FAC float data preload parameter struct with the default values */
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void fac_float_data_preload_init(fac_float_data_preload_struct *init_struct);
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/* initialize the FAC peripheral */
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void fac_init(fac_parameter_struct* fac_parameter);
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/* FAC preload X0 X1 Y fixed buffer */
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void fac_fixed_buffer_preload(fac_fixed_data_preload_struct* init_struct);
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/* FAC preload X0 X1 Y float buffer*/
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void fac_float_buffer_preload(fac_float_data_preload_struct* init_struct);
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/* FAC preload data */
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void fac_fixed_data_preload(uint8_t size, int16_t array[]);
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/* FAC preload float data */
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void fac_float_data_preload(uint8_t size, float array[]);
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/* configuration functions */
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/* FAC reset write and read pointers */
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void fac_reset(void);
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/* config the FAC clip feature */
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void fac_clip_config(uint8_t cpmod);
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/* enable FAC float point format */
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void fac_float_enable(void);
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/* disable FAC float point format */
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void fac_float_disable(void);
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/* enable the FAC dma */
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void fac_dma_enable(uint32_t dma_req);
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/* disable the FAC dma */
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void fac_dma_disable(uint32_t dma_req);
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/* FAC config input buffer */
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void fac_x0_config(uint32_t watermark, uint8_t baseaddr, uint8_t bufsize);
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/* FAC config coefficient buffer */
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void fac_x1_config(uint8_t baseaddr, uint8_t bufsize);
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/* FAC config output buffer */
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void fac_y_config(uint32_t watermark, uint8_t baseaddr, uint8_t bufsize);
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/* FAC config function execute */
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void fac_function_config(fac_parameter_struct* fac_parameter);
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/* start the FAC */
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void fac_start(void);
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/* stop the FAC */
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void fac_stop(void);
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/* finish the filter calculate */
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void fac_finish_calculate(void);
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/* FAC data write and read */
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/* FAC write data with fixed ponit format */
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void fac_fixed_data_write(int16_t data);
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/* FAC read data with fixed point format */
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int16_t fac_fixed_data_read(void);
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/* FAC write data with float ponit format */
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void fac_float_data_write(float data);
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/* FAC read data with fixed point format */
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float fac_float_data_read(void);
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/* interrupt & flag functions */
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/* enable the FAC interrupt */
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void fac_interrupt_enable(uint32_t interrupt);
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/* disable the FAC interrupt */
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void fac_interrupt_disable(uint32_t interrupt);
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/* get the FAC interrupt flag status */
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FlagStatus fac_interrupt_flag_get(uint8_t interrupt);
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/* get the FAC flag status */
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FlagStatus fac_flag_get(uint32_t flag);
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#endif /* GD32H75E_FAC_H */
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