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840 lines
65 KiB
840 lines
65 KiB
/*!
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\file gd32h75e_rtc.h
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\brief definitions for the RTC
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\version 2025-08-07, V1.2.0, firmware for GD32H75E
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*/
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/*
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Copyright (c) 2025, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#ifndef GD32H75E_RTC_H
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#define GD32H75E_RTC_H
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#include "gd32h75e.h"
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/* RTC definitions */
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#define RTC RTC_BASE /* RTC base address */
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/* registers definitions */
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#define RTC_TIME REG32((RTC) + 0x00000000U) /*!< RTC time of day register */
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#define RTC_DATE REG32((RTC) + 0x00000004U) /*!< RTC date register */
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#define RTC_CTL REG32((RTC) + 0x00000008U) /*!< RTC control register */
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#define RTC_STAT REG32((RTC) + 0x0000000CU) /*!< RTC status register */
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#define RTC_PSC REG32((RTC) + 0x00000010U) /*!< RTC time prescaler register */
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#define RTC_WUT REG32((RTC) + 0x00000014U) /*!< RTC wakeup timer regiser */
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#define RTC_ALRM0TD REG32((RTC) + 0x0000001CU) /*!< RTC alarm 0 time and date register */
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#define RTC_ALRM1TD REG32((RTC) + 0x00000020U) /*!< RTC alarm 1 time and date register */
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#define RTC_WPK REG32((RTC) + 0x00000024U) /*!< RTC write protection key register */
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#define RTC_SS REG32((RTC) + 0x00000028U) /*!< RTC sub second register */
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#define RTC_SHIFTCTL REG32((RTC) + 0x0000002CU) /*!< RTC shift function control register */
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#define RTC_TTS REG32((RTC) + 0x00000030U) /*!< RTC time of timestamp register */
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#define RTC_DTS REG32((RTC) + 0x00000034U) /*!< RTC date of timestamp register */
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#define RTC_SSTS REG32((RTC) + 0x00000038U) /*!< RTC sub second of timestamp register */
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#define RTC_HRFC REG32((RTC) + 0x0000003CU) /*!< RTC high resolution frequency compensation register */
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#define RTC_TAMP REG32((RTC) + 0x00000040U) /*!< RTC tamper register */
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#define RTC_ALRM0SS REG32((RTC) + 0x00000044U) /*!< RTC alarm 0 sub second register */
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#define RTC_ALRM1SS REG32((RTC) + 0x00000048U) /*!< RTC alarm 1 sub second register */
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#define RTC_CFG REG32((RTC) + 0x0000004CU) /*!< RTC configure register */
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#define RTC_BKP0 REG32((RTC) + 0x00000050U) /*!< RTC backup 0 register */
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#define RTC_BKP1 REG32((RTC) + 0x00000054U) /*!< RTC backup 1 register */
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#define RTC_BKP2 REG32((RTC) + 0x00000058U) /*!< RTC backup 2 register */
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#define RTC_BKP3 REG32((RTC) + 0x0000005CU) /*!< RTC backup 3 register */
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#define RTC_BKP4 REG32((RTC) + 0x00000060U) /*!< RTC backup 4 register */
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#define RTC_BKP5 REG32((RTC) + 0x00000064U) /*!< RTC backup 5 register */
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#define RTC_BKP6 REG32((RTC) + 0x00000068U) /*!< RTC backup 6 register */
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#define RTC_BKP7 REG32((RTC) + 0x0000006CU) /*!< RTC backup 7 register */
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#define RTC_BKP8 REG32((RTC) + 0x00000070U) /*!< RTC backup 8 register */
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#define RTC_BKP9 REG32((RTC) + 0x00000074U) /*!< RTC backup 9 register */
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#define RTC_BKP10 REG32((RTC) + 0x00000078U) /*!< RTC backup 10 register */
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#define RTC_BKP11 REG32((RTC) + 0x0000007CU) /*!< RTC backup 11 register */
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#define RTC_BKP12 REG32((RTC) + 0x00000080U) /*!< RTC backup 12 register */
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#define RTC_BKP13 REG32((RTC) + 0x00000084U) /*!< RTC backup 13 register */
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#define RTC_BKP14 REG32((RTC) + 0x00000088U) /*!< RTC backup 14 register */
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#define RTC_BKP15 REG32((RTC) + 0x0000008CU) /*!< RTC backup 15 register */
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#define RTC_BKP16 REG32((RTC) + 0x00000090U) /*!< RTC backup 16 register */
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#define RTC_BKP17 REG32((RTC) + 0x00000094U) /*!< RTC backup 17 register */
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#define RTC_BKP18 REG32((RTC) + 0x00000098U) /*!< RTC backup 18 register */
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#define RTC_BKP19 REG32((RTC) + 0x0000009CU) /*!< RTC backup 19 register */
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#define RTC_BKP20 REG32((RTC) + 0x000000A0U) /*!< RTC backup 20 register */
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#define RTC_BKP21 REG32((RTC) + 0x000000A4U) /*!< RTC backup 21 register */
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#define RTC_BKP22 REG32((RTC) + 0x000000A8U) /*!< RTC backup 22 register */
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#define RTC_BKP23 REG32((RTC) + 0x000000ACU) /*!< RTC backup 23 register */
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#define RTC_BKP24 REG32((RTC) + 0x000000B0U) /*!< RTC backup 24 register */
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#define RTC_BKP25 REG32((RTC) + 0x000000B4U) /*!< RTC backup 25 register */
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#define RTC_BKP26 REG32((RTC) + 0x000000B8U) /*!< RTC backup 26 register */
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#define RTC_BKP27 REG32((RTC) + 0x000000BCU) /*!< RTC backup 27 register */
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#define RTC_BKP28 REG32((RTC) + 0x000000C0U) /*!< RTC backup 28 register */
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#define RTC_BKP29 REG32((RTC) + 0x000000C4U) /*!< RTC backup 29 register */
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#define RTC_BKP30 REG32((RTC) + 0x000000C8U) /*!< RTC backup 30 register */
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#define RTC_BKP31 REG32((RTC) + 0x000000CCU) /*!< RTC backup 31 register */
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/* bits definitions */
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/* RTC_TIME */
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#define RTC_TIME_SCU BITS(0,3) /*!< second units in BCD code */
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#define RTC_TIME_SCT BITS(4,6) /*!< second tens in BCD code */
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#define RTC_TIME_MNU BITS(8,11) /*!< minute units in BCD code */
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#define RTC_TIME_MNT BITS(12,14) /*!< minute tens in BCD code */
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#define RTC_TIME_HRU BITS(16,19) /*!< hour units in BCD code */
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#define RTC_TIME_HRT BITS(20,21) /*!< hour tens in BCD code */
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#define RTC_TIME_PM BIT(22) /*!< AM/PM notation */
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/* RTC_DATE */
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#define RTC_DATE_DAYU BITS(0,3) /*!< date units in BCD code */
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#define RTC_DATE_DAYT BITS(4,5) /*!< date tens in BCD code */
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#define RTC_DATE_MONU BITS(8,11) /*!< month units in BCD code */
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#define RTC_DATE_MONT BIT(12) /*!< month tens in BCD code */
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#define RTC_DATE_DOW BITS(13,15) /*!< day of week units */
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#define RTC_DATE_YRU BITS(16,19) /*!< year units in BCD code */
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#define RTC_DATE_YRT BITS(20,23) /*!< year tens in BCD code */
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/* RTC_CTL */
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#define RTC_CTL_WTCS BITS(0,2) /*!< auto wakeup timer clock selection */
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#define RTC_CTL_TSEG BIT(3) /*!< valid event edge of time-stamp */
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#define RTC_CTL_REFEN BIT(4) /*!< reference clock detection function enable */
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#define RTC_CTL_BPSHAD BIT(5) /*!< shadow registers bypass control */
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#define RTC_CTL_CS BIT(6) /*!< display format of clock system */
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#define RTC_CTL_ALRM0EN BIT(8) /*!< alarm0 function enable */
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#define RTC_CTL_ALRM1EN BIT(9) /*!< alarm1 function enable */
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#define RTC_CTL_WTEN BIT(10) /*!< auto wakeup timer function enable */
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#define RTC_CTL_TSEN BIT(11) /*!< time-stamp function enable */
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#define RTC_CTL_ALRM0IE BIT(12) /*!< RTC alarm0 interrupt enable */
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#define RTC_CTL_ALRM1IE BIT(13) /*!< RTC alarm1 interrupt enable */
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#define RTC_CTL_WTIE BIT(14) /*!< auto wakeup timer interrupt enable */
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#define RTC_CTL_TSIE BIT(15) /*!< time-stamp interrupt enable */
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#define RTC_CTL_A1H BIT(16) /*!< add 1 hour(summer time change) */
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#define RTC_CTL_S1H BIT(17) /*!< subtract 1 hour(winter time change) */
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#define RTC_CTL_DSM BIT(18) /*!< daylight saving mark */
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#define RTC_CTL_COS BIT(19) /*!< calibration output selection */
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#define RTC_CTL_OPOL BIT(20) /*!< output polarity */
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#define RTC_CTL_OS BITS(21,22) /*!< output selection */
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#define RTC_CTL_COEN BIT(23) /*!< calibration output enable */
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#define RTC_CTL_ITSEN BIT(24) /*!< internal timestamp event enable */
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/* RTC_STAT */
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#define RTC_STAT_ALRM0WF BIT(0) /*!< alarm0 configuration can be write flag */
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#define RTC_STAT_ALRM1WF BIT(1) /*!< alarm1 configuration can be write flag */
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#define RTC_STAT_WTWF BIT(2) /*!< wakeup timer can be write flag */
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#define RTC_STAT_SOPF BIT(3) /*!< shift function operation pending flag */
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#define RTC_STAT_YCM BIT(4) /*!< year configuration mark status flag */
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#define RTC_STAT_RSYNF BIT(5) /*!< register synchronization flag */
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#define RTC_STAT_INITF BIT(6) /*!< initialization state flag */
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#define RTC_STAT_INITM BIT(7) /*!< enter initialization mode */
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#define RTC_STAT_ALRM0F BIT(8) /*!< alarm0 occurs flag */
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#define RTC_STAT_ALRM1F BIT(9) /*!< alarm1 occurs flag */
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#define RTC_STAT_WTF BIT(10) /*!< wakeup timer flag */
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#define RTC_STAT_TSF BIT(11) /*!< time-stamp flag */
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#define RTC_STAT_TSOVRF BIT(12) /*!< time-stamp overflow flag */
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#define RTC_STAT_TP0F BIT(13) /*!< RTC tamp 0 detected flag */
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#define RTC_STAT_TP1F BIT(15) /*!< RTC tamp 1 detected flag */
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#define RTC_STAT_SCPF BIT(16) /*!< Smooth calibration pending flag */
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#define RTC_STAT_ITSF BIT(17) /*!< Internal timestamp flag */
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/* RTC_PSC */
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#define RTC_PSC_FACTOR_S BITS(0,14) /*!< synchronous prescaler factor */
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#define RTC_PSC_FACTOR_A BITS(16,22) /*!< asynchronous prescaler factor */
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/* RTC_WUT */
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#define RTC_WUT_WTRV BITS(0,15) /*!< auto wakeup timer reloads value */
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/* RTC_ALRMxTD */
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#define RTC_ALRMXTD_SCU BITS(0,3) /*!< second units in BCD code */
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#define RTC_ALRMXTD_SCT BITS(4,6) /*!< second tens in BCD code */
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#define RTC_ALRMXTD_MSKS BIT(7) /*!< alarm second mask bit */
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#define RTC_ALRMXTD_MNU BITS(8,11) /*!< minutes units in BCD code */
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#define RTC_ALRMXTD_MNT BITS(12,14) /*!< minutes tens in BCD code */
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#define RTC_ALRMXTD_MSKM BIT(15) /*!< alarm minutes mask bit */
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#define RTC_ALRMXTD_HRU BITS(16,19) /*!< hour units in BCD code */
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#define RTC_ALRMXTD_HRT BITS(20,21) /*!< hour tens in BCD code */
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#define RTC_ALRMXTD_PM BIT(22) /*!< AM/PM flag */
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#define RTC_ALRMXTD_MSKH BIT(23) /*!< alarm hour mask bit */
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#define RTC_ALRMXTD_DAYU BITS(24,27) /*!< date units or week day in BCD code */
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#define RTC_ALRMXTD_DAYT BITS(28,29) /*!< date tens in BCD code */
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#define RTC_ALRMXTD_DOWS BIT(30) /*!< day of week selection */
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#define RTC_ALRMXTD_MSKD BIT(31) /*!< alarm date mask bit */
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/* RTC_WPK */
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#define RTC_WPK_WPK BITS(0,7) /*!< key for write protection */
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/* RTC_SS */
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#define RTC_SS_SSC BITS(0,15) /*!< sub second value */
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/* RTC_SHIFTCTL */
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#define RTC_SHIFTCTL_SFS BITS(0,14) /*!< subtract a fraction of a second */
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#define RTC_SHIFTCTL_A1S BIT(31) /*!< one second add */
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/* RTC_TTS */
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#define RTC_TTS_SCU BITS(0,3) /*!< second units in BCD code */
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#define RTC_TTS_SCT BITS(4,6) /*!< second tens in BCD code */
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#define RTC_TTS_MNU BITS(8,11) /*!< minute units in BCD code */
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#define RTC_TTS_MNT BITS(12,14) /*!< minute tens in BCD code */
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#define RTC_TTS_HRU BITS(16,19) /*!< hour units in BCD code */
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#define RTC_TTS_HRT BITS(20,21) /*!< hour tens in BCD code */
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#define RTC_TTS_PM BIT(22) /*!< AM/PM notation */
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/* RTC_DTS */
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#define RTC_DTS_DAYU BITS(0,3) /*!< date units in BCD code */
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#define RTC_DTS_DAYT BITS(4,5) /*!< date tens in BCD code */
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#define RTC_DTS_MONU BITS(8,11) /*!< month units in BCD code */
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#define RTC_DTS_MONT BIT(12) /*!< month tens in BCD code */
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#define RTC_DTS_DOW BITS(13,15) /*!< day of week units */
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/* RTC_SSTS */
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#define RTC_SSTS_SSC BITS(0,15) /*!< timestamp sub second units */
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/* RTC_HRFC */
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#define RTC_HRFC_CMSK BITS(0,8) /*!< calibration mask number */
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#define RTC_HRFC_CWND16 BIT(13) /*!< calibration window select 16 seconds */
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#define RTC_HRFC_CWND8 BIT(14) /*!< calibration window select 8 seconds */
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#define RTC_HRFC_FREQI BIT(15) /*!< increase RTC frequency by 488.5ppm */
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/* RTC_TAMP */
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#define RTC_TAMP_TP0EN BIT(0) /*!< tamper 0 detection enable */
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#define RTC_TAMP_TP0EG BIT(1) /*!< tamper 0 event trigger edge for RTC tamp 0 input */
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#define RTC_TAMP_TPIE BIT(2) /*!< enable tamper interrupt */
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#define RTC_TAMP_TP1EN BIT(5) /*!< tamper 1 detection enable */
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#define RTC_TAMP_TP1EG BIT(6) /*!< tamper 1 event trigger edge for RTC tamp 1 input */
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#define RTC_TAMP_TPTS BIT(7) /*!< make tamper function used for timestamp function */
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#define RTC_TAMP_FREQ BITS(8,10) /*!< sample frequency of tamper event detection */
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#define RTC_TAMP_FLT BITS(11,12) /*!< RTC tamp x filter count setting */
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#define RTC_TAMP_PRCH BITS(13,14) /*!< precharge duration time of RTC tamp x */
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#define RTC_TAMP_DISPU BIT(15) /*!< RTC tamp x pull up disable bit */
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/* RTC_ALRM0SS */
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#define RTC_ALRM0SS_SSC BITS(0,14) /*!< alarm0 sub second value */
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#define RTC_ALRM0SS_MASKSSC BITS(24,27) /*!< mask control bit of SS */
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/* RTC_ALRM1SS */
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#define RTC_ALRM1SS_SSC BITS(0,14) /*!< alarm1 sub second value */
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#define RTC_ALRM1SS_MASKSSC BITS(24,27) /*!< mask control bit of SS */
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/* RTC_CFG */
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#define RTC_CFG_OUT2EN BIT(1) /*!< RTC_OUT is output on PB2 or PC13 */
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#define RTC_CFG_ALRMOUTTYPE BIT(0) /*!< RTC_ALARM output is Push-pull output type */
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/* RTC_BKP0 */
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#define RTC_BKP0_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP1 */
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#define RTC_BKP1_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP2 */
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#define RTC_BKP2_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP3 */
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#define RTC_BKP3_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP4 */
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#define RTC_BKP4_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP5 */
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#define RTC_BKP5_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP6 */
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#define RTC_BKP6_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP7 */
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#define RTC_BKP7_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP8 */
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#define RTC_BKP8_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP9 */
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#define RTC_BKP9_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP10 */
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#define RTC_BKP10_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP11 */
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#define RTC_BKP11_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP12 */
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#define RTC_BKP12_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP13 */
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#define RTC_BKP13_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP14 */
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#define RTC_BKP14_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP15 */
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#define RTC_BKP15_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP16 */
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#define RTC_BKP16_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP17 */
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#define RTC_BKP17_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP18 */
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#define RTC_BKP18_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP19 */
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#define RTC_BKP19_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP20 */
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#define RTC_BKP20_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP21 */
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#define RTC_BKP21_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP22 */
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#define RTC_BKP22_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP23 */
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#define RTC_BKP23_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP24 */
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#define RTC_BKP24_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP25 */
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#define RTC_BKP25_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP26 */
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#define RTC_BKP26_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP27 */
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#define RTC_BKP27_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP28 */
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#define RTC_BKP28_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP29 */
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#define RTC_BKP29_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP30 */
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#define RTC_BKP30_DATA BITS(0,31) /*!< backup domain registers */
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/* RTC_BKP31 */
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#define RTC_BKP31_DATA BITS(0,31) /*!< backup domain registers */
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/* constants definitions */
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/* structure for initialization of the RTC */
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typedef struct {
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uint8_t year; /*!< RTC year value: 0x0 - 0x99(BCD format) */
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uint8_t month; /*!< RTC month value */
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uint8_t date; /*!< RTC date value: 0x1 - 0x31(BCD format) */
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uint8_t day_of_week; /*!< RTC weekday value */
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uint8_t hour; /*!< RTC hour value */
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uint8_t minute; /*!< RTC minute value: 0x0 - 0x59(BCD format) */
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uint8_t second; /*!< RTC second value: 0x0 - 0x59(BCD format) */
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uint16_t factor_asyn; /*!< RTC asynchronous prescaler value: 0x0 - 0x7F */
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uint16_t factor_syn; /*!< RTC synchronous prescaler value: 0x0 - 0x7FFF */
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uint32_t am_pm; /*!< RTC AM/PM value */
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uint32_t display_format; /*!< RTC time notation */
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} rtc_parameter_struct;
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/* structure for RTC alarm configuration */
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typedef struct {
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uint32_t alarm_mask; /*!< RTC alarm mask */
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uint32_t weekday_or_date; /*!< specify RTC alarm is on date or weekday */
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uint8_t alarm_day; /*!< RTC alarm date or weekday value*/
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uint8_t alarm_hour; /*!< RTC alarm hour value */
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uint8_t alarm_minute; /*!< RTC alarm minute value: 0x0 - 0x59(BCD format) */
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uint8_t alarm_second; /*!< RTC alarm second value: 0x0 - 0x59(BCD format) */
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uint32_t am_pm; /*!< RTC alarm AM/PM value */
|
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} rtc_alarm_struct;
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|
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/* structure for RTC time-stamp configuration */
|
|
typedef struct {
|
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uint8_t timestamp_month; /*!< RTC time-stamp month value */
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uint8_t timestamp_date; /*!< RTC time-stamp date value: 0x1 - 0x31(BCD format) */
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uint8_t timestamp_day; /*!< RTC time-stamp weekday value */
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uint8_t timestamp_hour; /*!< RTC time-stamp hour value */
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uint8_t timestamp_minute; /*!< RTC time-stamp minute value: 0x0 - 0x59(BCD format) */
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uint8_t timestamp_second; /*!< RTC time-stamp second value: 0x0 - 0x59(BCD format) */
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|
uint32_t am_pm; /*!< RTC time-stamp AM/PM value */
|
|
} rtc_timestamp_struct;
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|
|
|
/* structure for RTC tamper configuration */
|
|
typedef struct {
|
|
uint32_t tamper_source; /*!< RTC tamper source */
|
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uint32_t tamper_trigger; /*!< RTC tamper trigger */
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uint32_t tamper_filter; /*!< RTC tamper consecutive samples needed during a voltage level detection */
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uint32_t tamper_sample_frequency; /*!< RTC tamper sampling frequency during a voltage level detection */
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ControlStatus tamper_precharge_enable; /*!< RTC tamper precharge feature during a voltage level detection */
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uint32_t tamper_precharge_time; /*!< RTC tamper precharge duration if precharge feature is enabled */
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ControlStatus tamper_with_timestamp; /*!< RTC tamper time-stamp feature */
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} rtc_tamper_struct;
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/* time register value */
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#define TIME_SC(regval) (BITS(0,6) & ((uint32_t)(regval) << 0)) /*!< write value to RTC_TIME_SC bit field */
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#define GET_TIME_SC(regval) GET_BITS((regval),0,6) /*!< get value of RTC_TIME_SC bit field */
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#define TIME_MN(regval) (BITS(8,14) & ((uint32_t)(regval) << 8)) /*!< write value to RTC_TIME_MN bit field */
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#define GET_TIME_MN(regval) GET_BITS((regval),8,14) /*!< get value of RTC_TIME_MN bit field */
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#define TIME_HR(regval) (BITS(16,21) & ((uint32_t)(regval) << 16)) /*!< write value to RTC_TIME_HR bit field */
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#define GET_TIME_HR(regval) GET_BITS((regval),16,21) /*!< get value of RTC_TIME_HR bit field */
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#define RTC_AM ((uint32_t)0x00000000U) /*!< AM format */
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#define RTC_PM RTC_TIME_PM /*!< PM format */
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/* date register value */
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#define DATE_DAY(regval) (BITS(0,5) & ((uint32_t)(regval) << 0)) /*!< write value to RTC_DATE_DAY bit field */
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#define GET_DATE_DAY(regval) GET_BITS((regval),0,5) /*!< get value of RTC_DATE_DAY bit field */
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#define DATE_MON(regval) (BITS(8,12) & ((uint32_t)(regval) << 8)) /*!< write value to RTC_DATE_MON bit field */
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#define GET_DATE_MON(regval) GET_BITS((regval),8,12) /*!< get value of RTC_DATE_MON bit field */
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#define RTC_JAN ((uint8_t)0x01U) /*!< Janurary */
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#define RTC_FEB ((uint8_t)0x02U) /*!< February */
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#define RTC_MAR ((uint8_t)0x03U) /*!< March */
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#define RTC_APR ((uint8_t)0x04U) /*!< April */
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#define RTC_MAY ((uint8_t)0x05U) /*!< May */
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#define RTC_JUN ((uint8_t)0x06U) /*!< June */
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#define RTC_JUL ((uint8_t)0x07U) /*!< July */
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#define RTC_AUG ((uint8_t)0x08U) /*!< August */
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#define RTC_SEP ((uint8_t)0x09U) /*!< September */
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#define RTC_OCT ((uint8_t)0x10U) /*!< October */
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#define RTC_NOV ((uint8_t)0x11U) /*!< November */
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#define RTC_DEC ((uint8_t)0x12U) /*!< December */
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#define DATE_DOW(regval) (BITS(13,15) & ((uint32_t)(regval) << 13)) /*!< write value to RTC_DATE_DOW bit field */
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#define GET_DATE_DOW(regval) GET_BITS((uint32_t)(regval),13,15) /*!< get value of RTC_DATE_DOW bit field */
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#define RTC_MONDAY ((uint8_t)0x01) /*!< monday */
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#define RTC_TUESDAY ((uint8_t)0x02) /*!< tuesday */
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#define RTC_WEDNESDAY ((uint8_t)0x03) /*!< wednesday */
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#define RTC_THURSDAY ((uint8_t)0x04) /*!< thursday */
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#define RTC_FRIDAY ((uint8_t)0x05) /*!< friday */
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#define RTC_SATURDAY ((uint8_t)0x06) /*!< saturday */
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#define RTC_SUNDAY ((uint8_t)0x07) /*!< sunday */
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#define DATE_YR(regval) (BITS(16,23) & ((uint32_t)(regval) << 16)) /*!< write value to RTC_DATE_YR bit field */
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#define GET_DATE_YR(regval) GET_BITS((regval),16,23) /*!< get value of RTC_DATE_YR bit field */
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#define RTC_OUT_PC13 ((uint32_t)0x00000000U) /*!< RTC_OUT is connected to PC13 */
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#define RTC_OUT_PB2 RTC_CTL_OUT2EN /*!< RTC_OUT is connected to PB2 */
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#define CTL_OS(regval) (BITS(21,22) & ((uint32_t)(regval) << 21)) /*!< write value to RTC_CTL_OS bit field */
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#define RTC_OS_DISABLE CTL_OS(0) /*!< disable output RTC_ALARM */
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#define RTC_OS_ALARM0 CTL_OS(1) /*!< enable alarm0 flag output */
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#define RTC_OS_ALARM1 CTL_OS(2) /*!< enable alarm1 flag output */
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#define RTC_OS_WAKEUP CTL_OS(3) /*!< enable wakeup flag output */
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#define RTC_ITSEN_DISABLE ((uint32_t)0x00000000U) /*!< disable output RTC_ALARM */
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#define RTC_ITSEN_ENABLE RTC_CTL_ITSEN /*!< enable alarm0 flag output */
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#define RTC_CALIBRATION_512HZ RTC_CTL_COEN /*!< calibration output of 512Hz is enable */
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#define RTC_CALIBRATION_1HZ (RTC_CTL_COEN | RTC_CTL_COS) /*!< calibration output of 1Hz is enable */
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#define RTC_ALARM0_HIGH RTC_OS_ALARM0 /*!< enable alarm0 flag output with high level */
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#define RTC_ALARM0_LOW (RTC_OS_ALARM0 | RTC_CTL_OPOL) /*!< enable alarm0 flag output with low level*/
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#define RTC_ALARM1_HIGH RTC_OS_ALARM1 /*!< enable alarm1 flag output with high level */
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#define RTC_ALARM1_LOW (RTC_OS_ALARM1 | RTC_CTL_OPOL) /*!< enable alarm1 flag output with low level*/
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#define RTC_WAKEUP_HIGH RTC_OS_WAKEUP /*!< enable wakeup flag output with high level */
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#define RTC_WAKEUP_LOW (RTC_OS_WAKEUP | RTC_CTL_OPOL) /*!< enable wakeup flag output with low level*/
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#define RTC_24HOUR ((uint32_t)0x00000000U) /*!< 24-hour format */
|
|
#define RTC_12HOUR RTC_CTL_CS /*!< 12-hour format */
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#define RTC_TIMESTAMP_RISING_EDGE ((uint32_t)0x00000000U) /*!< rising edge is valid event edge for time-stamp event */
|
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#define RTC_TIMESTAMP_FALLING_EDGE RTC_CTL_TSEG /*!< falling edge is valid event edge for time-stamp event */
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#define CTL_WTCS(regval) (BITS(0,2) & ((uint32_t)(regval)<< 0))
|
|
#define WAKEUP_RTCCK_DIV16 CTL_WTCS(0) /*!< wakeup timer clock is RTC clock divided by 16 */
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#define WAKEUP_RTCCK_DIV8 CTL_WTCS(1) /*!< wakeup timer clock is RTC clock divided by 8 */
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|
#define WAKEUP_RTCCK_DIV4 CTL_WTCS(2) /*!< wakeup timer clock is RTC clock divided by 4 */
|
|
#define WAKEUP_RTCCK_DIV2 CTL_WTCS(3) /*!< wakeup timer clock is RTC clock divided by 2 */
|
|
#define WAKEUP_CKSPRE CTL_WTCS(4) /*!< wakeup timer clock is ckapre */
|
|
#define WAKEUP_CKSPRE_2EXP16 CTL_WTCS(6) /*!< wakeup timer clock is ckapre and wakeup timer add 2exp16 */
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|
|
|
/* psc register value */
|
|
#define PSC_FACTOR_S(regval) (BITS(0,14) & ((uint32_t)(regval) << 0)) /*!< write value to RTC_PSC_FACTOR_S bit field */
|
|
#define GET_PSC_FACTOR_S(regval) GET_BITS((regval),0,14) /*!< get value of RTC_PSC_FACTOR_S bit field */
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|
|
|
#define PSC_FACTOR_A(regval) (BITS(16,22) & ((uint32_t)(regval) << 16)) /*!< write value to RTC_PSC_FACTOR_A bit field */
|
|
#define GET_PSC_FACTOR_A(regval) GET_BITS((regval),16,22) /*!< get value of RTC_PSC_FACTOR_A bit field */
|
|
|
|
/* alrmtd register value */
|
|
#define ALRMTD_SC(regval) (BITS(0,6) & ((uint32_t)(regval)<< 0)) /*!< write value to RTC_ALRMTD_SC bit field */
|
|
#define GET_ALRMTD_SC(regval) GET_BITS((regval),0,6) /*!< get value of RTC_ALRMTD_SC bit field */
|
|
|
|
#define ALRMTD_MN(regval) (BITS(8,14) & ((uint32_t)(regval) << 8)) /*!< write value to RTC_ALRMTD_MN bit field */
|
|
#define GET_ALRMTD_MN(regval) GET_BITS((regval),8,14) /*!< get value of RTC_ALRMTD_MN bit field */
|
|
|
|
#define ALRMTD_HR(regval) (BITS(16,21) & ((uint32_t)(regval) << 16)) /*!< write value to RTC_ALRMTD_HR bit field */
|
|
#define GET_ALRMTD_HR(regval) GET_BITS((regval),16,21) /*!< get value of RTC_ALRMTD_HR bit field */
|
|
|
|
#define ALRMTD_DAY(regval) (BITS(24,29) & ((uint32_t)(regval) << 24)) /*!< write value to RTC_ALRMTD_DAY bit field */
|
|
#define GET_ALRMTD_DAY(regval) GET_BITS((regval),24,29) /*!< get value of RTC_ALRMTD_DAY bit field */
|
|
|
|
#define RTC_ALARM_NONE_MASK ((uint32_t)0x00000000U) /*!< alarm none mask */
|
|
#define RTC_ALARM_DATE_MASK RTC_ALRMXTD_MSKD /*!< alarm date mask */
|
|
#define RTC_ALARM_HOUR_MASK RTC_ALRMXTD_MSKH /*!< alarm hour mask */
|
|
#define RTC_ALARM_MINUTE_MASK RTC_ALRMXTD_MSKM /*!< alarm minute mask */
|
|
#define RTC_ALARM_SECOND_MASK RTC_ALRMXTD_MSKS /*!< alarm second mask */
|
|
#define RTC_ALARM_ALL_MASK (RTC_ALRMXTD_MSKD|RTC_ALRMXTD_MSKH|RTC_ALRMXTD_MSKM|RTC_ALRMXTD_MSKS) /*!< alarm all mask */
|
|
|
|
#define RTC_ALARM_DATE_SELECTED ((uint32_t)0x00000000U) /*!< alarm date format selected */
|
|
#define RTC_ALARM_WEEKDAY_SELECTED RTC_ALRMXTD_DOWS /*!< alarm weekday format selected */
|
|
|
|
/* wpk register value */
|
|
#define WPK_WPK(regval) (BITS(0,7) & ((uint32_t)(regval) << 0)) /*!< write value to RTC_WPK_WPK bit field */
|
|
|
|
/* ss register value */
|
|
#define SS_SSC(regval) (BITS(0,15) & ((uint32_t)(regval) << 0)) /*!< write value to RTC_SS_SSC bit field */
|
|
|
|
/* shiftctl register value */
|
|
#define SHIFTCTL_SFS(regval) (BITS(0,14) & ((uint32_t)(regval) << 0)) /*!< write value to RTC_SHIFTCTL_SFS bit field */
|
|
|
|
#define RTC_SHIFT_ADD1S_RESET ((uint32_t)0x00000000U) /*!< not add 1 second */
|
|
#define RTC_SHIFT_ADD1S_SET RTC_SHIFTCTL_A1S /*!< add one second to the clock */
|
|
|
|
/* tts register value */
|
|
#define TTS_SC(regval) (BITS(0,6) & ((uint32_t)(regval) << 0)) /*!< write value to RTC_TTS_SC bit field */
|
|
#define GET_TTS_SC(regval) GET_BITS((regval),0,6) /*!< get value of RTC_TTS_SC bit field */
|
|
|
|
#define TTS_MN(regval) (BITS(8,14) & ((uint32_t)(regval) << 8)) /*!< write value to RTC_TTS_MN bit field */
|
|
#define GET_TTS_MN(regval) GET_BITS((regval),8,14) /*!< get value of RTC_TTS_MN bit field */
|
|
|
|
#define TTS_HR(regval) (BITS(16,21) & ((uint32_t)(regval) << 16)) /*!< write value to RTC_TTS_HR bit field */
|
|
#define GET_TTS_HR(regval) GET_BITS((regval),16,21) /*!< get value of RTC_TTS_HR bit field */
|
|
|
|
/* dts register value */
|
|
#define DTS_DAY(regval) (BITS(0,5) & ((uint32_t)(regval) << 0)) /*!< write value to RTC_DTS_DAY bit field */
|
|
#define GET_DTS_DAY(regval) GET_BITS((regval),0,5) /*!< get value of RTC_DTS_DAY bit field */
|
|
|
|
#define DTS_MON(regval) (BITS(8,12) & ((uint32_t)(regval) << 8)) /*!< write value to RTC_DTS_MON bit field */
|
|
#define GET_DTS_MON(regval) GET_BITS((regval),8,12) /*!< get value of RTC_DTS_MON bit field */
|
|
|
|
#define DTS_DOW(regval) (BITS(13,15) & ((uint32_t)(regval) << 13)) /*!< write value to RTC_DTS_DOW bit field */
|
|
#define GET_DTS_DOW(regval) GET_BITS((regval),13,15) /*!< get value of RTC_DTS_DOW bit field */
|
|
|
|
/* ssts register value */
|
|
#define SSTS_SSC(regval) (BITS(0,15) & ((uint32_t)(regval) << 0)) /*!< write value to RTC_SSTS_SSC bit field */
|
|
|
|
/* hrfc register value */
|
|
#define HRFC_CMSK(regval) (BITS(0,8) & ((uint32_t)(regval) << 0)) /*!< write value to RTC_HRFC_CMSK bit field */
|
|
|
|
#define RTC_CALIBRATION_WINDOW_32S ((uint32_t)0x00000000U) /*!< 2exp20 RTCCLK cycles, 32s if RTCCLK = 32768 Hz */
|
|
#define RTC_CALIBRATION_WINDOW_16S RTC_HRFC_CWND16 /*!< 2exp19 RTCCLK cycles, 16s if RTCCLK = 32768 Hz */
|
|
#define RTC_CALIBRATION_WINDOW_8S RTC_HRFC_CWND8 /*!< 2exp18 RTCCLK cycles, 8s if RTCCLK = 32768 Hz */
|
|
|
|
#define RTC_CALIBRATION_PLUS_SET RTC_HRFC_FREQI /*!< increase RTC frequency by 488.5ppm */
|
|
#define RTC_CALIBRATION_PLUS_RESET ((uint32_t)0x00000000U) /*!< no effect */
|
|
|
|
#define TAMP_PRCH(regval) (BITS(13,14) & ((uint32_t)(regval) << 13)) /*!< write value to RTC_TAMP_PRCH bit field */
|
|
#define RTC_PRCH_1C TAMP_PRCH(0) /*!< 1 RTC clock prechagre time before each sampling */
|
|
#define RTC_PRCH_2C TAMP_PRCH(1) /*!< 2 RTC clock prechagre time before each sampling */
|
|
#define RTC_PRCH_4C TAMP_PRCH(2) /*!< 4 RTC clock prechagre time before each sampling */
|
|
#define RTC_PRCH_8C TAMP_PRCH(3) /*!< 8 RTC clock prechagre time before each sampling */
|
|
|
|
#define TAMP_FLT(regval) (BITS(11,12) & ((uint32_t)(regval) << 11)) /*!< write value to RTC_TAMP_FLT bit field */
|
|
#define RTC_FLT_EDGE TAMP_FLT(0) /*!< detecting tamper event using edge mode. precharge duration is disabled automatically */
|
|
#define RTC_FLT_2S TAMP_FLT(1) /*!< detecting tamper event using level mode.2 consecutive valid level samples will make a effective tamper event */
|
|
#define RTC_FLT_4S TAMP_FLT(2) /*!< detecting tamper event using level mode.4 consecutive valid level samples will make an effective tamper event */
|
|
#define RTC_FLT_8S TAMP_FLT(3) /*!< detecting tamper event using level mode.8 consecutive valid level samples will make a effective tamper event */
|
|
|
|
#define TAMP_FREQ(regval) (BITS(8,10) & ((uint32_t)(regval) << 8)) /*!< write value to RTC_TAMP_FREQ bit field */
|
|
#define RTC_FREQ_DIV32768 TAMP_FREQ(0) /*!< sample once every 32768 RTCCLK(1Hz if RTCCLK=32.768KHz) */
|
|
#define RTC_FREQ_DIV16384 TAMP_FREQ(1) /*!< sample once every 16384 RTCCLK(2Hz if RTCCLK=32.768KHz) */
|
|
#define RTC_FREQ_DIV8192 TAMP_FREQ(2) /*!< sample once every 8192 RTCCLK(4Hz if RTCCLK=32.768KHz) */
|
|
#define RTC_FREQ_DIV4096 TAMP_FREQ(3) /*!< sample once every 4096 RTCCLK(8Hz if RTCCLK=32.768KHz) */
|
|
#define RTC_FREQ_DIV2048 TAMP_FREQ(4) /*!< sample once every 2048 RTCCLK(16Hz if RTCCLK=32.768KHz) */
|
|
#define RTC_FREQ_DIV1024 TAMP_FREQ(5) /*!< sample once every 1024 RTCCLK(32Hz if RTCCLK=32.768KHz) */
|
|
#define RTC_FREQ_DIV512 TAMP_FREQ(6) /*!< sample once every 512 RTCCLK(64Hz if RTCCLK=32.768KHz) */
|
|
#define RTC_FREQ_DIV256 TAMP_FREQ(7) /*!< sample once every 256 RTCCLK(128Hz if RTCCLK=32.768KHz) */
|
|
|
|
#define RTC_TAMPER0 RTC_TAMP_TP0EN /*!< tamper 0 detection enable */
|
|
#define RTC_TAMPER1 RTC_TAMP_TP1EN /*!< tamper 1 detection enable */
|
|
|
|
#define RTC_TAMPER_TRIGGER_EDGE_RISING ((uint32_t)0x00000000U) /*!< tamper detection is in rising edge mode */
|
|
#define RTC_TAMPER_TRIGGER_EDGE_FALLING RTC_TAMP_TP0EG /*!< tamper detection is in falling edge mode */
|
|
#define RTC_TAMPER_TRIGGER_LEVEL_LOW ((uint32_t)0x00000000U) /*!< tamper detection is in low level mode */
|
|
#define RTC_TAMPER_TRIGGER_LEVEL_HIGH RTC_TAMP_TP0EG /*!< tamper detection is in high level mode */
|
|
|
|
#define RTC_TAMPER_TRIGGER_POS ((uint32_t)0x00000001U) /* shift position of trigger relative to source */
|
|
|
|
#define RTC_ALARM_OUTPUT_OD ((uint32_t)0x00000000U) /*!< RTC alarm output open-drain mode */
|
|
#define RTC_ALARM_OUTPUT_PP RTC_CTL_ALRMOUTTYPE /*!< RTC alarm output push-pull mode */
|
|
|
|
/* alrm0ss register value */
|
|
#define ALRMXSS_SSC(regval) (BITS(0,14) & ((uint32_t)(regval)<< 0)) /*!< write value to RTC_ALRMXSS_SSC bit field */
|
|
|
|
#define ALRMXSS_MSKSSC(regval) (BITS(24,27) & ((uint32_t)(regval) << 24)) /*!< write value to RTC_ALRMXSS_MSKSSC bit field */
|
|
#define RTC_MSKSSC_0_14 ALRMXSS_MSKSSC(0) /*!< mask alarm subsecond configuration */
|
|
#define RTC_MSKSSC_1_14 ALRMXSS_MSKSSC(1) /*!< mask RTC_ALRMXSS_SSC[14:1], and RTC_ALRMXSS_SSC[0] is to be compared */
|
|
#define RTC_MSKSSC_2_14 ALRMXSS_MSKSSC(2) /*!< mask RTC_ALRMXSS_SSC[14:2], and RTC_ALRMXSS_SSC[1:0] is to be compared */
|
|
#define RTC_MSKSSC_3_14 ALRMXSS_MSKSSC(3) /*!< mask RTC_ALRMXSS_SSC[14:3], and RTC_ALRMXSS_SSC[2:0] is to be compared */
|
|
#define RTC_MSKSSC_4_14 ALRMXSS_MSKSSC(4) /*!< mask RTC_ALRMXSS_SSC[14:4]], and RTC_ALRMXSS_SSC[3:0] is to be compared */
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#define RTC_MSKSSC_5_14 ALRMXSS_MSKSSC(5) /*!< mask RTC_ALRMXSS_SSC[14:5], and RTC_ALRMXSS_SSC[4:0] is to be compared */
|
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#define RTC_MSKSSC_6_14 ALRMXSS_MSKSSC(6) /*!< mask RTC_ALRMXSS_SSC[14:6], and RTC_ALRMXSS_SSC[5:0] is to be compared */
|
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#define RTC_MSKSSC_7_14 ALRMXSS_MSKSSC(7) /*!< mask RTC_ALRMXSS_SSC[14:7], and RTC_ALRMXSS_SSC[6:0] is to be compared */
|
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#define RTC_MSKSSC_8_14 ALRMXSS_MSKSSC(8) /*!< mask RTC_ALRMXSS_SSC[14:8], and RTC_ALRMXSS_SSC[7:0] is to be compared */
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#define RTC_MSKSSC_9_14 ALRMXSS_MSKSSC(9) /*!< mask RTC_ALRMXSS_SSC[14:9], and RTC_ALRMXSS_SSC[8:0] is to be compared */
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#define RTC_MSKSSC_10_14 ALRMXSS_MSKSSC(10) /*!< mask RTC_ALRMXSS_SSC[14:10], and RTC_ALRMXSS_SSC[9:0] is to be compared */
|
|
#define RTC_MSKSSC_11_14 ALRMXSS_MSKSSC(11) /*!< mask RTC_ALRMXSS_SSC[14:11], and RTC_ALRMXSS_SSC[10:0] is to be compared */
|
|
#define RTC_MSKSSC_12_14 ALRMXSS_MSKSSC(12) /*!< mask RTC_ALRMXSS_SSC[14:12], and RTC_ALRMXSS_SSC[11:0] is to be compared */
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#define RTC_MSKSSC_13_14 ALRMXSS_MSKSSC(13) /*!< mask RTC_ALRMXSS_SSC[14:13], and RTC_ALRMXSS_SSC[12:0] is to be compared */
|
|
#define RTC_MSKSSC_14 ALRMXSS_MSKSSC(14) /*!< mask RTC_ALRMXSS_SSC[14], and RTC_ALRMXSS_SSC[13:0] is to be compared */
|
|
#define RTC_MSKSSC_NONE ALRMXSS_MSKSSC(15) /*!< mask none, and RTC_ALRMXSS_SSC[14:0] is to be compared */
|
|
|
|
/* RTC interrupt source */
|
|
#define RTC_INT_TIMESTAMP RTC_CTL_TSIE /*!< time-stamp interrupt enable */
|
|
#define RTC_INT_ALARM0 RTC_CTL_ALRM0IE /*!< RTC alarm0 interrupt enable */
|
|
#define RTC_INT_ALARM1 RTC_CTL_ALRM1IE /*!< RTC alarm1 interrupt enable */
|
|
#define RTC_INT_TAMP_ALL RTC_TAMP_TPIE /*!< tamper detection interrupt enable */
|
|
#define RTC_INT_WAKEUP RTC_CTL_WTIE /*!< RTC wakeup timer interrupt enable */
|
|
|
|
/* write protect key */
|
|
#define RTC_UNLOCK_KEY1 ((uint8_t)0xCAU) /*!< RTC unlock key1 */
|
|
#define RTC_UNLOCK_KEY2 ((uint8_t)0x53U) /*!< RTC unlock key2 */
|
|
#define RTC_LOCK_KEY ((uint8_t)0xFFU) /*!< RTC lock key */
|
|
|
|
/* registers reset value */
|
|
#define RTC_REGISTER_RESET ((uint32_t)0x00000000U) /*!< RTC common register reset value */
|
|
#define RTC_DATE_RESET ((uint32_t)0x00002101U) /*!< RTC_DATE register reset value */
|
|
#define RTC_STAT_RESET ((uint32_t)0x00000007U) /*!< RTC_STAT register reset value */
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#define RTC_PSC_RESET ((uint32_t)0x007F00FFU) /*!< RTC_PSC register reset value */
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#define RTC_WUT_RESET ((uint32_t)0x0000FFFFU) /*!< RTC_WUT register reset value */
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/* RTC alarm */
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#define RTC_ALARM0 ((uint8_t)0x01U) /*!< RTC alarm 0 */
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#define RTC_ALARM1 ((uint8_t)0x02U) /*!< RTC alarm 1 */
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/* RTC flag */
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#define RTC_FLAG_ALARM0W RTC_STAT_ALRM0WF /*!< alarm0 configuration can be write flag */
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#define RTC_FLAG_ALARM1W RTC_STAT_ALRM1WF /*!< alarm1 configuration can be write flag */
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#define RTC_FLAG_WTW RTC_STAT_WTWF /*!< wakeup timer can be write flag */
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#define RTC_FLAG_SOP RTC_STAT_SOPF /*!< shift function operation pending flag */
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#define RTC_FLAG_YCM RTC_STAT_YCM /*!< year parameter configured event flag */
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#define RTC_FLAG_RSYN RTC_STAT_RSYNF /*!< registers synchronized flag */
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#define RTC_FLAG_INIT RTC_STAT_INITF /*!< init mode event flag */
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#define RTC_FLAG_SCP RTC_STAT_SOPF /*!< smooth calibration pending flag */
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#define RTC_FLAG_ALARM0 RTC_STAT_ALRM0F /*!< alarm event flag */
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#define RTC_FLAG_ALARM1 RTC_STAT_ALRM1F /*!< alarm1 occurs flag */
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#define RTC_FLAG_WT RTC_STAT_WTF /*!< wakeup timer occurs flag */
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#define RTC_FLAG_TS RTC_STAT_TSF /*!< time-stamp flag */
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#define RTC_FLAG_TSOVR RTC_STAT_TSOVRF /*!< time-stamp overflow flag */
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#define RTC_FLAG_TP0 RTC_STAT_TP0F /*!< RTC tamper 0 detected flag */
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#define RTC_FLAG_TP2 RTC_STAT_TP2F /*!< RTC tamper 2 detected flag */
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/* parameter check definitions */
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#ifdef FW_DEBUG_ERR_REPORT
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#define NOT_RTC_ALARM_VALID(rtc_alarm) (((rtc_alarm) != RTC_ALARM0) && ((rtc_alarm) != RTC_ALARM1))
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#define NOT_RTC_ALARM_MASK(mask) (((mask) != RTC_ALARM_NONE_MASK) && ((mask) != RTC_ALARM_DATE_MASK) && \
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((mask) != RTC_ALARM_HOUR_MASK) && ((mask) != RTC_ALARM_MINUTE_MASK) && \
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((mask) != RTC_ALARM_SECOND_MASK) && ((mask) != RTC_ALARM_ALL_MASK))
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#define NOT_RTC_WEEKDAY_OR_DATE(weekday) (((weekday) != RTC_ALARM_DATE_SELECTED) && ((weekday) != RTC_ALARM_WEEKDAY_SELECTED))
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#define NOT_RTC_ALARM_DAY(day) (((day) != RTC_MONDAY) && ((day) != RTC_TUESDAY) && \
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((day) != RTC_WEDNESDAY) && ((day) != RTC_THURSDAY) && \
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((day) != RTC_FRIDAY) && ((day) != RTC_SATURDAY) && \
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((day) != RTC_SUNDAY) && (((day) > 0x31U) || ((day) == 0x00U)))
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#define NOT_RTC_ALARM_HOUR(hour) ((hour) > 0x23U)
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#define NOT_RTC_ALARM_MINUTE(minute) ((minute) > 0x59U)
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#define NOT_RTC_ALARM_SECOND(second) ((second) > 0x59U)
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#define NOT_RTC_AM_PM(ampm) (((ampm) != RTC_AM) && ((ampm) != RTC_PM))
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#define NOT_RTC_YEAR(year) ((year) > 0x99U)
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#define NOT_RTC_MONTH(mouth) (((mouth) != RTC_JAN) && ((mouth) != RTC_FEB) && \
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((mouth) != RTC_MAR) && ((mouth) != RTC_APR) && \
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((mouth) != RTC_MAY) && ((mouth) != RTC_JUN) && \
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((mouth) != RTC_JUL) && ((mouth) != RTC_AUG) && \
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((mouth) != RTC_SEP) && ((mouth) != RTC_OCT) && \
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((mouth) != RTC_NOV) && ((mouth) != RTC_DEC))
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#define NOT_RTC_DATE(date) (((date) > 0x31U) || ((date) == 0x00U))
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#define NOT_RTC_EDGE(edge) (((edge) != RTC_TIMESTAMP_RISING_EDGE) && ((edge) != RTC_TIMESTAMP_FALLING_EDGE))
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#define NOT_RTC_ITSEN_MODE_VALID(mode) (((mode) != RTC_ITSEN_DISABLE )&& ((mode) != RTC_ITSEN_ENABLE))
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#define NOT_RTC_TAMPER_SOURCE(source) (((source) != RTC_TAMPER0) && ((source) != RTC_TAMPER1))
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#define NOT_RTC_TAMPER_TRIGGER_VALID(trigger) (((trigger) != RTC_TAMPER_TRIGGER_EDGE_RISING) && ((trigger) != RTC_TAMPER_TRIGGER_EDGE_FALLING )&& \
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((trigger) != RTC_TAMPER_TRIGGER_LEVEL_LOW) && ((trigger) != RTC_TAMPER_TRIGGER_LEVEL_HIGH))
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#define NOT_RTC_TAMPER_FILTER_VALID(filter) (((filter) != RTC_FLT_EDGE) &&((filter) != RTC_FLT_2S)&& \
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((filter) != RTC_FLT_4S) &&((filter) != RTC_FLT_8S))
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#define NOT_RTC_SAMPLE_FREQ_VALID(freq) (((freq) != RTC_FREQ_DIV32768 )&& ((freq) != RTC_FREQ_DIV16384) && \
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((freq) != RTC_FREQ_DIV8192 )&& ((freq) != RTC_FREQ_DIV4096) && \
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((freq) != RTC_FREQ_DIV2048) && ((freq) != RTC_FREQ_DIV1024)&& \
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((freq) != RTC_FREQ_DIV512) && ((freq) != RTC_FREQ_DIV256))
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#define NOT_RTC_ALARM_OUTPUT_MODE_VALID(mode) (((mode) != RTC_ALARM_OUTPUT_OD) && ((mode) != RTC_ALARM_OUTPUT_PP))
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#define NOT_RTC_TAMPER_PRECHARGE_TIME(time) (((time) != RTC_PRCH_1C )&& ((time) && RTC_PRCH_2C) && \
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((time) != RTC_PRCH_4C) && ((time) != RTC_PRCH_8C))
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#define NOT_RTC_ALARM_OUTPUT_SOURCE_VALID(source) (((source) != RTC_ALARM0_HIGH) && ((source) != RTC_ALARM0_LOW) && \
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((source) != RTC_ALARM1_HIGH)&&((source) != RTC_ALARM1_LOW) && \
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((source) != RTC_WAKEUP_HIGH)&&((source) != RTC_WAKEUP_LOW))
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#define NOT_RTC_WAKEUP_CLOCK_VALID(wakeup_clock) (((wakeup_clock) != WAKEUP_RTCCK_DIV16) &&((wakeup_clock) != WAKEUP_RTCCK_DIV8) && \
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((wakeup_clock) != WAKEUP_RTCCK_DIV4)&&((wakeup_clock) != WAKEUP_RTCCK_DIV2) && \
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((wakeup_clock) != WAKEUP_CKSPRE)&& ((wakeup_clock) != WAKEUP_CKSPRE_2EXP16))
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#define NOT_RTC_WAKEUP_TIMER_VALID(wakeup_timer) ((wakeup_timer) == 0x0000U)
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#define NOT_RTC_SOURCE(source) (((source) != RTC_CALIBRATION_512HZ) && ((source) != RTC_CALIBRATION_1HZ))
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#define NOT_RTC_MODE(mode) (((mode) != RTC_ALARM_OUTPUT_OD) && ((mode) != RTC_CTL_ALRMOUTTYPE))
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#define NOT_RTC_MASK_SUBSECOND(mask) (((mask) != RTC_MSKSSC_0_14) && ((mask) != RTC_MSKSSC_1_14) && \
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((mask) != RTC_MSKSSC_2_14) && ((mask) != RTC_MSKSSC_3_14) && \
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((mask) != RTC_MSKSSC_4_14) && ((mask) != RTC_MSKSSC_5_14) && \
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((mask) != RTC_MSKSSC_6_14) && ((mask) != RTC_MSKSSC_7_14) && \
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((mask) != RTC_MSKSSC_8_14) && ((mask) != RTC_MSKSSC_9_14) && \
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((mask) != RTC_MSKSSC_10_14) && ((mask) != RTC_MSKSSC_11_14) && \
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((mask) != RTC_MSKSSC_12_14) && ((mask) != RTC_MSKSSC_13_14) && \
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((mask) != RTC_MSKSSC_14) && ((mask) != RTC_MSKSSC_NONE))
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#define NOT_RTC_SUBSECOND(subsecond) ((subsecond) > 0x7FFFU)
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#define NOT_RTC_DAY_OF_WEEK(week) (((week) != RTC_MONDAY) && ((week) != RTC_TUESDAY) && \
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((week) != RTC_WEDNESDAY) && ((week) != RTC_THURSDAY) && \
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((week) != RTC_FRIDAY) && ((week) != RTC_SATURDAY) && \
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((week) != RTC_SUNDAY))
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#define NOT_RTC_HOUR(hour) ((hour) > 0x23U)
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#define NOT_RTC_MINUTE(minute) ((minute) > 0x59U)
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#define NOT_RTC_SECOND(second) ((second) > 0x59U)
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#define NOT_RTC_FACTOR_ASYN(asyn) ((asyn) > 0x7FU)
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#define NOT_RTC_FACTOR_SYN(syn) ((syn) > 0x7FFFU)
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#define NOT_RTC_DISPLAY_FORMAT(format) (((format) != RTC_24HOUR) && ((format) != RTC_12HOUR))
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#define NOT_RTC_OPERATION(operation) (((operation) != RTC_CTL_A1H) && ((operation) != RTC_CTL_S1H))
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#define NOT_RTC_ADD(add) (((add) != RTC_SHIFT_ADD1S_RESET) && ((add) != RTC_SHIFT_ADD1S_SET))
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#define NOT_RTC_MINUS(minus) ((minus) > 0x7FFFU)
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#define NOT_RTC_WINDOW(window) (((window) != RTC_CALIBRATION_WINDOW_32S) && ((window) != RTC_CALIBRATION_WINDOW_16S) && \
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((window) != RTC_CALIBRATION_WINDOW_8S))
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#define NOT_RTC_PLUS(plus) (((plus) != RTC_CALIBRATION_PLUS_SET) && ((plus) != RTC_CALIBRATION_PLUS_RESET))
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#define NOT_RTC_SMOOTH_MINUS(smooth_minus) ((smooth_minus) > 0x1FFU)
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#define NOT_RTC_OUTPUTPIN(outputpin) (((outputpin) != RTC_OUT_PC13) && ((outputpin) != RTC_CFG_OUT2EN))
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#define NOT_RTC_FLAG(flag) (((flag) != RTC_FLAG_SCP) && ((flag) != RTC_FLAG_TSOVR) && \
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((flag) != RTC_FLAG_TS) && ((flag) != RTC_FLAG_ALARM0) && \
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((flag) != RTC_FLAG_INIT) && ((flag) != RTC_FLAG_RSYN) && \
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((flag) != RTC_FLAG_YCM) && ((flag) != RTC_FLAG_SOP) && \
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((flag) != RTC_FLAG_ALARM0W))
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#define NOT_RTC_INTERRUPT(interrupt) (((interrupt) != RTC_INT_TIMESTAMP) && ((interrupt) != RTC_INT_ALARM0))
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/* check the RTC pointer*/
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#define NOT_RTC_VALID_POINTER(pointer) ((void *) 0 == (pointer)) /*!< check the invalid pointer */
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#endif
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/* function declarations */
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/* initialization and configuration functions */
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/* reset most of the RTC registers */
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ErrStatus rtc_deinit(void);
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/* initialize RTC registers */
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ErrStatus rtc_init(rtc_parameter_struct *rtc_initpara_struct);
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/* enter RTC init mode */
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ErrStatus rtc_init_mode_enter(void);
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/* exit RTC init mode */
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void rtc_init_mode_exit(void);
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/* wait until RTC_TIME and RTC_DATE registers are synchronized with APB clock, and the shadow registers are updated */
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ErrStatus rtc_register_sync_wait(void);
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/* get current time and date */
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void rtc_current_time_get(rtc_parameter_struct *rtc_initpara_struct);
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/* get current subsecond value */
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uint32_t rtc_subsecond_get(void);
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/* alarm configuration functions */
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/* configure RTC alarm */
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void rtc_alarm_config(uint8_t rtc_alarm, rtc_alarm_struct *rtc_alarm_time);
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/* configure subsecond of RTC alarm */
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void rtc_alarm_subsecond_config(uint8_t rtc_alarm, uint32_t mask_subsecond, uint32_t subsecond);
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/* get RTC alarm */
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void rtc_alarm_get(uint8_t rtc_alarm, rtc_alarm_struct *rtc_alarm_time);
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/* get RTC alarm subsecond */
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uint32_t rtc_alarm_subsecond_get(uint8_t rtc_alarm);
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/* enable RTC alarm */
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void rtc_alarm_enable(uint8_t rtc_alarm);
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/* disable RTC alarm */
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ErrStatus rtc_alarm_disable(uint8_t rtc_alarm);
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/* timestamp and tamper configuration functions */
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/* enable RTC time-stamp */
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void rtc_timestamp_enable(uint32_t edge);
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/* disable RTC time-stamp */
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void rtc_timestamp_disable(void);
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/* get RTC timestamp time and date */
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void rtc_timestamp_get(rtc_timestamp_struct *rtc_timestamp);
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/* configure RTC time-stamp internal event */
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void rtc_timestamp_internalevent_config(uint32_t mode);
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/* get RTC time-stamp subsecond */
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uint32_t rtc_timestamp_subsecond_get(void);
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/* enable RTC tamper */
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void rtc_tamper_enable(rtc_tamper_struct *rtc_tamper);
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/* disable RTC tamper */
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void rtc_tamper_disable(uint32_t source);
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/* select the RTC output pin */
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void rtc_output_pin_select(uint32_t outputpin);
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/* configure RTC alarm output source */
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void rtc_alarm_output_config(uint32_t source, uint32_t mode);
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/* configure RTC calibration output source */
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void rtc_calibration_output_config(uint32_t source);
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/* adjust the daylight saving time by adding or substracting one hour from the current time */
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void rtc_hour_adjust(uint32_t operation);
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/* adjust RTC second or subsecond value of current time */
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ErrStatus rtc_second_adjust(uint32_t add, uint32_t minus);
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/* enable RTC bypass shadow registers function */
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void rtc_bypass_shadow_enable(void);
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/* disable RTC bypass shadow registers function */
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void rtc_bypass_shadow_disable(void);
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/* enable RTC reference clock detection function */
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ErrStatus rtc_refclock_detection_enable(void);
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/* disable RTC reference clock detection function */
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ErrStatus rtc_refclock_detection_disable(void);
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/* enable RTC wakeup timer */
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void rtc_wakeup_enable(void);
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/* disable RTC wakeup timer */
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ErrStatus rtc_wakeup_disable(void);
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/* set auto wakeup timer clock */
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ErrStatus rtc_wakeup_clock_set(uint32_t wakeup_clock);
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/* set auto wakeup timer value */
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ErrStatus rtc_wakeup_timer_set(uint16_t wakeup_timer);
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/* get auto wakeup timer value */
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uint16_t rtc_wakeup_timer_get(void);
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/* configure RTC smooth calibration */
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ErrStatus rtc_smooth_calibration_config(uint32_t window, uint32_t plus, uint32_t minus);
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/* enable specified RTC interrupt */
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void rtc_interrupt_enable(uint32_t interrupt);
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/* disable specified RTC interrupt */
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void rtc_interrupt_disable(uint32_t interrupt);
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/* check specified flag */
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FlagStatus rtc_flag_get(uint32_t flag);
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/* clear specified flag */
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void rtc_flag_clear(uint32_t flag);
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#endif /* GD32H75E_RTC_H */
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